From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C874EC19F2A for ; Thu, 11 Aug 2022 16:26:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238214AbiHKQ0t (ORCPT ); Thu, 11 Aug 2022 12:26:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238035AbiHKQYf (ORCPT ); Thu, 11 Aug 2022 12:24:35 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 640E02714D; Thu, 11 Aug 2022 09:06:28 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0F9E7B821AE; Thu, 11 Aug 2022 16:06:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 942D4C433C1; Thu, 11 Aug 2022 16:06:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660233985; bh=SyOADJj+ILiiJ+e/eFz+NYJUoMOSMjGukNO2QZYUOu8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ajZgEkAtr5fP2XgTkee3901FH69KBXPejMNLTwKbz86j7uAB/7/jJZTnbcXAKq3cp GRWiGPxAJn9EZ145Q0fZv4icTucdbc6j1GoawQ6teUmCDbNayt/No9LUIvQfJS/YB7 oUz1fcCn+t4OiGUvTH2dObKWx1GfrnklRKp8QHFbulP9oakXut+JH5+nmRSTjlLY7v NyHBGb7ql0u4TkHwzLh2jAHMUMbHx7SnIc2A7z1c0h8EE4ISpBcCQwYh3ZMy3XgDpB VPmR6T1tXWKMs5ufhp7W09/3kdQDQUpYKvGmmndYOmJG3LX41njk5yh+6NsTB32GKD uQp5Teykbynsg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Jiri Vanek , Vinay Simha BN , Robert Foss , Sasha Levin , andrzej.hajda@intel.com, narmstrong@baylibre.com, airlied@linux.ie, daniel@ffwll.ch, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.10 22/46] drm/bridge/tc358775: Fix DSI clock division for vsync delay calculation Date: Thu, 11 Aug 2022 12:03:46 -0400 Message-Id: <20220811160421.1539956-22-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220811160421.1539956-1-sashal@kernel.org> References: <20220811160421.1539956-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jiri Vanek [ Upstream commit 993a87917c2af59efb0ee1ce43c878ca8790ba1c ] Use the same PCLK divide option (divide DSI clock to generate pixel clock) which is set to LVDS Configuration Register (LVCFG) also for a VSync delay calculation. Without this change an auxiliary variable could underflow during the calculation for some dual-link LVDS panels and then calculated VSync delay is wrong. This leads to a shifted picture on a panel. Tested-by: Jiri Vanek Signed-off-by: Jiri Vanek Reviewed-by: Vinay Simha BN Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/20220615222221.1501-3-jirivanek1@gmail.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/bridge/tc358775.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c index 2272adcc5b4a..70b6210c9803 100644 --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -429,7 +429,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge) val = TC358775_VPCTRL_MSF(1); dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000; - clkdiv = dsiclk / DIVIDE_BY_3 * tc->lvds_link; + clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3); byteclk = dsiclk / 4; t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes; t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_porch) / 1000; -- 2.35.1