From: Rob Clark <robdclark@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
Rob Clark <robdclark@chromium.org>,
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH 1/5] iommu/arm-smmu-qcom: Fix indentation
Date: Sun, 21 Aug 2022 11:19:02 -0700 [thread overview]
Message-ID: <20220821181917.1188021-2-robdclark@gmail.com> (raw)
In-Reply-To: <20220821181917.1188021-1-robdclark@gmail.com>
From: Rob Clark <robdclark@chromium.org>
Plus typo.
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
include/linux/adreno-smmu-priv.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/linux/adreno-smmu-priv.h b/include/linux/adreno-smmu-priv.h
index c637e0997f6d..ac4c2c0ab724 100644
--- a/include/linux/adreno-smmu-priv.h
+++ b/include/linux/adreno-smmu-priv.h
@@ -37,7 +37,7 @@ struct adreno_smmu_fault_info {
/**
* struct adreno_smmu_priv - private interface between adreno-smmu and GPU
*
- * @cookie: An opque token provided by adreno-smmu and passed
+ * @cookie: An opaque token provided by adreno-smmu and passed
* back into the callbacks
* @get_ttbr1_cfg: Get the TTBR1 config for the GPUs context-bank
* @set_ttbr0_cfg: Set the TTBR0 config for the GPUs context bank. A
@@ -61,12 +61,12 @@ struct adreno_smmu_fault_info {
* it's domain.
*/
struct adreno_smmu_priv {
- const void *cookie;
- const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie);
- int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg);
- void (*get_fault_info)(const void *cookie, struct adreno_smmu_fault_info *info);
- void (*set_stall)(const void *cookie, bool enabled);
- void (*resume_translation)(const void *cookie, bool terminate);
+ const void *cookie;
+ const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie);
+ int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg);
+ void (*get_fault_info)(const void *cookie, struct adreno_smmu_fault_info *info);
+ void (*set_stall)(const void *cookie, bool enabled);
+ void (*resume_translation)(const void *cookie, bool terminate);
};
#endif /* __ADRENO_SMMU_PRIV_H */
--
2.37.2
next prev parent reply other threads:[~2022-08-21 18:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-21 18:19 [PATCH 0/5] drm/msm+iommu/arm-smmu-qcom: tlbinv optimizations Rob Clark
2022-08-21 18:19 ` Rob Clark [this message]
2022-08-21 18:19 ` [PATCH 2/5] iommu/arm-smmu-qcom: Provide way to access current TTBR0 Rob Clark
2022-08-21 18:19 ` [PATCH 3/5] iommu/arm-smmu-qcom: Add private interface to tlbinv by ASID Rob Clark
2022-08-21 18:19 ` [PATCH 4/5] drm/msm: Use separate ASID for each set of pgtables Rob Clark
2022-08-22 13:52 ` Robin Murphy
2022-08-22 14:38 ` Robin Murphy
2022-08-21 18:19 ` [PATCH 5/5] drm/msm: Skip tlbinv on unmap from non-current pgtables Rob Clark
2022-08-24 17:46 ` Akhil P Oommen
2022-08-24 19:02 ` Rob Clark
2022-08-25 18:12 ` Akhil P Oommen
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