From: Bjorn Helgaas <helgaas@kernel.org>
To: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, mka@chromium.org,
quic_vbadigan@quicinc.com, quic_hemantk@quicinc.com,
quic_nitegupt@quicinc.com, quic_skananth@quicinc.com,
quic_ramkri@quicinc.com, manivannan.sadhasivam@linaro.org,
swboyd@chromium.org, dmitry.baryshkov@linaro.org,
"Stanimir Varbanov" <svarbanov@mm-sol.com>,
"Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <bjorn.andersson@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>
Subject: Re: [PATCH v3 1/3] PCI: qcom: Add sc7280 aggre0, aggre1 and ddr sf tbu clocks in PCIe driver
Date: Wed, 7 Sep 2022 13:44:37 -0500 [thread overview]
Message-ID: <20220907184437.GA137711@bhelgaas> (raw)
In-Reply-To: <1662171184-25211-2-git-send-email-quic_krichai@quicinc.com>
On Sat, Sep 03, 2022 at 07:43:02AM +0530, Krishna chaitanya chundru wrote:
> Add missing aggre0, aggre1 and ddrs sf tbu clocks in PCIe driver.
>
> If these clocks are not presenti, the PCIe link goes down in system suspend
> and resume.
s/presenti/present/
But the hardware clocks are present regardless of this driver change.
I suspect the point of this is really that if the driver doesn't
clk_get() these clocks to increase the reference count, we don't know
that the clocks are in use, and since they appear unused, they get
turned off during suspend.
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 2ea1375..a7202f0 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1548,7 +1548,10 @@ static const struct qcom_pcie_cfg sm8450_pcie1_cfg = {
> static const struct qcom_pcie_cfg sc7280_cfg = {
> .ops = &ops_1_9_0,
> .has_tbu_clk = true,
> + .has_ddrss_sf_tbu_clk = true,
> .pipe_clk_need_muxing = true,
> + .has_aggre0_clk = true,
> + .has_aggre1_clk = true,
> };
>
> static const struct qcom_pcie_cfg sc8180x_cfg = {
> --
> 2.7.4
>
next prev parent reply other threads:[~2022-09-07 18:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-03 2:13 [PATCH v3 0/3] PCI: qcom: sc7280: add missing aggre0, aggre1 and ddrs sf tbu clocks Krishna chaitanya chundru
2022-09-03 2:13 ` [PATCH v3 1/3] PCI: qcom: Add sc7280 aggre0, aggre1 and ddr sf tbu clocks in PCIe driver Krishna chaitanya chundru
2022-09-03 4:50 ` Dmitry Baryshkov
2022-09-07 18:44 ` Bjorn Helgaas [this message]
2022-09-08 6:36 ` Krishna Chaitanya Chundru
2022-09-03 2:13 ` [PATCH v3 2/3] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks Krishna chaitanya chundru
2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-08 6:37 ` Krishna Chaitanya Chundru
2022-09-03 2:13 ` [PATCH v3 3/3] arm64: dts: qcom: sc7280: Add missing " Krishna chaitanya chundru
2022-09-07 12:22 ` Krzysztof Kozlowski
2022-09-08 6:38 ` Krishna Chaitanya Chundru
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