From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDF23ECAAD8 for ; Fri, 16 Sep 2022 14:35:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231135AbiIPOfd (ORCPT ); Fri, 16 Sep 2022 10:35:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231175AbiIPOfU (ORCPT ); Fri, 16 Sep 2022 10:35:20 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDCBD3AE69 for ; Fri, 16 Sep 2022 07:35:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663338919; x=1694874919; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=DU0ASoiYHnD2XYvJnAjTDIYjyHka9r6t0mFD1c/2KII=; b=dUQ188Wx6IDpm6doIr+pVwVzkwqbYFilgSJeMdEMJ1njl5C9bEPdoijz VD3BYb6oNiD3RjSjcCZ59vnQ8nkjZIj+PEoYhDM743XExIDPlTyUycA0Q 3wQH1aC0sbbqErhuojPfBTlxQKZD5UY1bPIOuks6erdVBES07fgjLPSlK s9n8+I/uKlEPKsQd7ZSi+40kXAL1VbjDF+od2BcJ3t6KBn1Wy3oxgFcFS ga1tcxtscS3VHmH4hmRdeSqlCFdvcNIs9hj8XWO3xyBJISCqVkbsgWfF3 t4Rk9ENfD5oZ0hPRavM/WZt5hfkvtdOqFHBMOlzzs7Pq98bHC/vAIL3t1 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10472"; a="297726935" X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="297726935" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2022 07:35:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="793115937" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orsmga005.jf.intel.com with ESMTP; 16 Sep 2022 07:35:18 -0700 Date: Fri, 16 Sep 2022 07:41:13 -0700 From: Ricardo Neri To: Peter Zijlstra Cc: Juri Lelli , Vincent Guittot , Ricardo Neri , "Ravi V. Shankar" , Ben Segall , Daniel Bristot de Oliveira , Dietmar Eggemann , Len Brown , Mel Gorman , "Rafael J. Wysocki" , Srinivas Pandruvada , Steven Rostedt , Tim Chen , Valentin Schneider , x86@kernel.org, linux-kernel@vger.kernel.org, "Tim C . Chen" Subject: Re: [RFC PATCH 01/23] sched/task_struct: Introduce classes of tasks Message-ID: <20220916144112.GA29395@ranerica-svr.sc.intel.com> References: <20220909231205.14009-1-ricardo.neri-calderon@linux.intel.com> <20220909231205.14009-2-ricardo.neri-calderon@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 14, 2022 at 03:46:34PM +0200, Peter Zijlstra wrote: > On Fri, Sep 09, 2022 at 04:11:43PM -0700, Ricardo Neri wrote: > > > include/linux/sched.h | 7 +++++++ > > init/Kconfig | 9 +++++++++ > > 2 files changed, 16 insertions(+) > > > > diff --git a/include/linux/sched.h b/include/linux/sched.h > > index e7b2f8a5c711..acc33dbaa47c 100644 > > --- a/include/linux/sched.h > > +++ b/include/linux/sched.h > > @@ -117,6 +117,8 @@ struct task_group; > > __TASK_TRACED | EXIT_DEAD | EXIT_ZOMBIE | \ > > TASK_PARKED) > > > > +#define TASK_CLASS_UNCLASSIFIED -1 > > > +#ifdef CONFIG_SCHED_TASK_CLASSES > > + /* Class of task that the scheduler uses for task placement decisions */ > > + short class; > > +#endif Thanks for your feedback Peter! > > You're missing a hunk for init/init_task.c for this non-zero init value. Ah, yes. I'll add it. > > Does we really have to use a signed type and non-zero init value? At least on Intel processors, class 0 is a valid class. The scheduler needs to have a notion of unclassified tasks and decide how to handle them, IMO. Intel processors currently support 8-bit, unsigned classes. I doubt other architectures will ever support more than 256 classes. Short can handle all the possible classification values and also the unclassified case. On the other hand, class 0 could be the default classification unless hardware classifies differently. 0 would be special and need to be documented clearly. This would work for Intel processors. Thanks and BR, Ricardo