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From: Feng Tang <feng.tang@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@intel.com>,
	"H . Peter Anvin" <hpa@zytor.com>,
	Peter Zijlstra <peterz@infradead.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Cc: rui.zhang@intel.com, tim.c.chen@intel.com,
	Xiongfeng Wang <wangxiongfeng2@huawei.com>,
	Feng Tang <feng.tang@intel.com>, Yu Liao <liaoyu15@huawei.com>
Subject: [PATCH] x86/tsc: Extend the watchdog check exemption to 4S/8S machine
Date: Sun,  9 Oct 2022 13:12:09 +0800	[thread overview]
Message-ID: <20221009051209.393377-1-feng.tang@intel.com> (raw)

There is report again that the tsc clocksource on a 4 sockets x86
Skylake server was wrongly judged as 'unstable' by 'jiffies' watchdog,
and disabled [1]. Also we got silimar reports on 8 sockets platform
from internal test.

Commit b50db7095fe0 ("x86/tsc: Disable clocksource watchdog for TSC
on qualified platorms") was introduce to deal with these false
alarms of tsc unstable issues, covering qualified platforms for 2
sockets or smaller ones.

Extend the exemption also to 4/8 sockets to fix the issue.

Rui also proposed another way to disable 'jiffies' as clocksource
watchdog [2], which can also solve this specific problem in an
architecture independent way, with one limitation that some tsc false
alarms are reported by other watchdogs like HPET in post-boot time,
while 'jiffies' is mostly used in boot phase before hardware
clocksources are initialized.

[1]. https://lore.kernel.org/all/9d3bf570-3108-0336-9c52-9bee15767d29@huawei.com/
[2]. https://lore.kernel.org/all/bd5b97f89ab2887543fc262348d1c7cafcaae536.camel@intel.com/

Reported-by: Yu Liao <liaoyu15@huawei.com>
Tested-by: Yu Liao <liaoyu15@huawei.com>
Signed-off-by: Feng Tang <feng.tang@intel.com>
---
 arch/x86/kernel/tsc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index cafacb2e58cc..b4ea79cb1d1a 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1217,7 +1217,7 @@ static void __init check_system_tsc_reliable(void)
 	if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 	    boot_cpu_has(X86_FEATURE_NONSTOP_TSC) &&
 	    boot_cpu_has(X86_FEATURE_TSC_ADJUST) &&
-	    nr_online_nodes <= 2)
+	    nr_online_nodes <= 8)
 		tsc_disable_clocksource_watchdog();
 }
 
-- 
2.34.1


             reply	other threads:[~2022-10-09  5:12 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-09  5:12 Feng Tang [this message]
2022-10-09 13:01 ` Peter Zijlstra
2022-10-10  1:23   ` Feng Tang
2022-10-10 14:23     ` Dave Hansen
2022-10-11  1:09       ` Feng Tang
2022-10-11  7:51         ` Feng Tang
2022-10-11 13:01           ` Peter Zijlstra
2022-10-12  8:44             ` Feng Tang
2022-10-11  7:52       ` Peter Zijlstra
2022-10-11 13:33         ` Zhang Rui
2022-10-11 14:01           ` Peter Zijlstra
2022-10-11 14:11             ` Feng Tang

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