From: Dragan Cvetic <dragan.m.cvetic@gmail.com>
To: philipp.g.hortmann@gmail.com
Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org,
Dragan Cvetic <dragan.m.cvetic@gmail.com>
Subject: [PATCH 1/3] staging: rtl8192e: Rename RateAdapt..., RxPath...TH_low, RxPath..._TH
Date: Mon, 10 Oct 2022 20:04:37 +0100 [thread overview]
Message-ID: <20221010190439.13131-2-dragan.m.cvetic@gmail.com> (raw)
In-Reply-To: <20221010190439.13131-1-dragan.m.cvetic@gmail.com>
Rename macros: RateAdaptiveTH_High to RATE_ADAPTIVE_TH_HIGH,
RxPathSelection_SS_TH_low to RX_PATH_SELECTION_SS_TH_LOW and
RxPathSelection_diff_TH to RX_PATH_SELECTION_DIFF_TH
to avoid CamelCase which is not accepted by checkpatch.
Signed-off-by: Dragan Cvetic <dragan.m.cvetic@gmail.com>
---
drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c | 4 ++--
drivers/staging/rtl8192e/rtl8192e/rtl_dm.c | 8 ++++----
drivers/staging/rtl8192e/rtl8192e/rtl_dm.h | 6 +++---
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
index 18e4e5d84878..3a2e89f6f683 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
@@ -2109,9 +2109,9 @@ bool rtl92e_is_rx_stuck(struct net_device *dev)
u8 SilentResetRxSoltNum = 4;
rx_chk_cnt++;
- if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5)) {
+ if (priv->undecorated_smoothed_pwdb >= (RATE_ADAPTIVE_TH_HIGH + 5)) {
rx_chk_cnt = 0;
- } else if ((priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High + 5))
+ } else if ((priv->undecorated_smoothed_pwdb < (RATE_ADAPTIVE_TH_HIGH + 5))
&& (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
(priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M))
|| ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
index d7bfaf68291c..fab427e3597e 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
@@ -284,11 +284,11 @@ void rtl92e_init_adaptive_rate(struct net_device *dev)
struct rate_adaptive *pra = &priv->rate_adaptive;
pra->ratr_state = DM_RATR_STA_MAX;
- pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
+ pra->high2low_rssi_thresh_for_ra = RATE_ADAPTIVE_TH_HIGH;
pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
- pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
+ pra->high_rssi_thresh_for_ra = RATE_ADAPTIVE_TH_HIGH + 5;
pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
@@ -1734,8 +1734,8 @@ static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev);
DM_RxPathSelTable.Enable = 1;
- DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
- DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
+ DM_RxPathSelTable.SS_TH_low = RX_PATH_SELECTION_SS_TH_LOW;
+ DM_RxPathSelTable.diff_TH = RX_PATH_SELECTION_DIFF_TH;
if (priv->CustomerID == RT_CID_819x_Netcore)
DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
else
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
index 51e295d389a8..bf96eb25d808 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
@@ -26,10 +26,10 @@
#define DM_DIG_MIN 0x1c
#define DM_DIG_MIN_Netcore 0x12
-#define RxPathSelection_SS_TH_low 30
-#define RxPathSelection_diff_TH 18
+#define RX_PATH_SELECTION_SS_TH_LOW 30
+#define RX_PATH_SELECTION_DIFF_TH 18
-#define RateAdaptiveTH_High 50
+#define RATE_ADAPTIVE_TH_HIGH 50
#define RateAdaptiveTH_Low_20M 30
#define RateAdaptiveTH_Low_40M 10
#define VeryLowRSSI 15
--
2.25.1
next prev parent reply other threads:[~2022-10-10 19:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-10 19:04 [PATCH 0/3] staging: r8192e: Rename macro defined in rtl_dm.h Dragan Cvetic
2022-10-10 19:04 ` Dragan Cvetic [this message]
2022-10-10 19:04 ` [PATCH 2/3] staging: rtl8192e: Rename RateAdap...20M, RateAdap...40M, VeryLowRSSI Dragan Cvetic
2022-10-10 19:04 ` [PATCH 3/3] staging: rtl8192e: Rename WAIotTHVal, RegC38_TH Dragan Cvetic
2022-10-11 19:50 ` [PATCH 0/3] staging: r8192e: Rename macro defined in rtl_dm.h Philipp Hortmann
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