From: Davidlohr Bueso <dave@stgolabs.net>
To: Dave Hansen <dave.hansen@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
linux-cxl@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4] memregion: Add cpu_cache_invalidate_memregion() interface
Date: Thu, 27 Oct 2022 12:23:41 -0700 [thread overview]
Message-ID: <20221027192341.flsnbnmptd4t32ki@offworld> (raw)
In-Reply-To: <3ce6ef93-2f47-eda3-f974-0cfea7f43766@intel.com>
On Thu, 27 Oct 2022, Dave Hansen wrote:
>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>> index 67745ceab0db..b68661d0633b 100644
>> --- a/arch/x86/Kconfig
>> +++ b/arch/x86/Kconfig
>> @@ -69,6 +69,7 @@ config X86
>> select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE
>> select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
>> select ARCH_HAS_CACHE_LINE_SIZE
>> + select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION if X86_64
>
>What is 64-bit only about this?
>
>I don't expect to have a lot of NVDIMMs or CXL devices on 32-bit
>kernels, but it would be nice to remove this if it's not strictly
>needed. Or, to add a changelog nugget that says:
>
> Restrict this to X86_64 kernels. It would probably work on 32-
> bit, but there is no practical reason to use 32-bit kernels and
> no one is testing them.
Yes, this was to further limit the potential users.
prev parent reply other threads:[~2022-10-27 19:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-25 20:05 Dan Williams
2022-10-27 16:18 ` Dave Hansen
2022-10-27 18:07 ` Dan Williams
2022-10-27 19:23 ` Davidlohr Bueso [this message]
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