From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CC6AFA3747 for ; Tue, 1 Nov 2022 06:11:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229926AbiKAGLt (ORCPT ); Tue, 1 Nov 2022 02:11:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229872AbiKAGLq (ORCPT ); Tue, 1 Nov 2022 02:11:46 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1763FD12; Mon, 31 Oct 2022 23:11:43 -0700 (PDT) X-UUID: de6589935b0e41e78e0fb48dd639a5b9-20221101 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=GxTScHc95rAlhDh/s52djMefw1krEYgEA7nv6cnnb8A=; b=Z00mFAFZlNTpt4nb5ZCIDDjaCCJjJA8W5pv2/hCkaCNAaWgbeqREZrj6FZEt7TfexhnWPZ4Km7fLco83l5i2zbmrd2bCXi5hDnmRb+sCgyBKdoIsy2rPX7l9QGdBZu/t3OHBsFuXpysiVVcYx9/m7SxPaXJqNgpweq9EKK0xGLM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12,REQID:c16064ff-58d2-491b-861b-a9c5d5323c00,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:62cd327,CLOUDID:896f3e81-3116-4fbc-b86b-83475c3df513,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: de6589935b0e41e78e0fb48dd639a5b9-20221101 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 133397477; Tue, 01 Nov 2022 14:11:40 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 1 Nov 2022 14:11:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 1 Nov 2022 14:11:39 +0800 From: Tinghan Shen To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Pierre-Louis Bossart , Liam Girdwood , Peter Ujfalusi , Bard Liao , Ranjani Sridharan , Kai Vehmanen , Daniel Baluta , Mark Brown , Jaroslav Kysela , Takashi Iwai , Tinghan Shen , Yaochun Hung CC: , , , , , , Subject: [PATCH v1 0/2] Revise mt8186 ADSP clock driver Date: Tue, 1 Nov 2022 14:11:35 +0800 Message-ID: <20221101061137.25731-1-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Initialize the dependent clock sources for mt8186 ADSP and fix the enable/disable order of ADSP clocks. --- Tinghan Shen (2): dt-bindings: dsp: mediatek: Add default clock sources for mt8186 dsp ASoC: SOF: mediatek: Revise mt8186 ADSP clock driver .../bindings/dsp/mediatek,mt8186-dsp.yaml | 12 +++++-- sound/soc/sof/mediatek/mt8186/mt8186-clk.c | 35 +++++++++++++++---- sound/soc/sof/mediatek/mt8186/mt8186-clk.h | 2 ++ 3 files changed, 39 insertions(+), 10 deletions(-) -- 2.18.0