[PATCH v1 1/2] dt-bindings: dsp: mediatek: Add default clock sources for mt8186 dsp

[Tinghan Shen <tinghan.shen@mediatek.com>]

Add the default clock sources used by mt8186 dsp.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
---
 .../devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml
index 3e63f79890b4..4cc0634c876b 100644
--- a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml
+++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml
@@ -35,11 +35,15 @@ properties:
     items:
       - description: mux for audio dsp clock
       - description: mux for audio dsp local bus
+      - description: default clock source for dsp local bus
+      - description: default clock source for dsp core
 
   clock-names:
     items:
       - const: audiodsp
       - const: adsp_bus
+      - const: mainpll_d2_d2
+      - const: clk26m
 
   power-domains:
     maxItems: 1
@@ -82,9 +86,11 @@ examples:
               <0x1068f000 0x1000>;
         reg-names = "cfg", "sram", "sec", "bus";
         clocks = <&topckgen CLK_TOP_AUDIODSP>,
-                 <&topckgen CLK_TOP_ADSP_BUS>;
-        clock-names = "audiodsp",
-                      "adsp_bus";
+                 <&topckgen CLK_TOP_ADSP_BUS>,
+                 <&topckgen CLK_TOP_MAINPLL_D2_D2>,
+                 <&clk26m>;
+        clock-names = "audiodsp", "adsp_bus",
+                      "mainpll_d2_d2", "clk26m";
         power-domains = <&spm 6>;
         mbox-names = "rx", "tx";
         mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
-- 
2.18.0