From: Conor Dooley <conor.dooley@microchip.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Daire McNamara <daire.mcnamara@microchip.com>,
<linux-kernel@vger.kernel.org>, <linux-pwm@vger.kernel.org>,
<linux-riscv@lists.infradead.org>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v12 0/2] Hey Uwe, all,
Date: Thu, 10 Nov 2022 09:35:11 +0000 [thread overview]
Message-ID: <20221110093512.333881-1-conor.dooley@microchip.com> (raw)
I've dropped the first two patches, as I applied them last night to my
tree, so just the driver & maintainers change here now.
The pre 6.0-rc1 cover letter/series is here:
https://lore.kernel.org/linux-pwm/20220721172109.941900-1-mail@conchuod.ie
Thanks,
Conor.
Changes since v11:
- swap a "bare" multiply & divide for the corresponding helper to
prevent overflow
- factor out duplicate clk rate acquisition & period calculation
- make the period calculation return void by checking the validity of
the clock rate in the caller
Changes since v10:
- reword some comments
- try to assign the period if a disable is requested
- drop a cast around a u8 -> u16 conversion
- fix a check on period_steps that should be on the hw_ variant
- split up the period calculation in get_state() to fix the result on
32 bit
- add a rate variable in get_state() to only call get_rate() once
- redo the locking as suggested to make it more straightforward.
- stop checking for enablement in get_state() that was working around
intended behaviour of the sysfs interface
Changes since v9:
- fixed the missing unlock that Dan reported
Changes since v8:
- fixed a(nother) raw 64 bit division (& built it for riscv32!)
- added a check to make sure we don't try to sleep for 0 us
Changes since v7:
- rebased on 6.0-rc1
- reworded comments you highlighted in v7
- fixed the overkill sleeping
- removed the unused variables in calc_duty
- added some extra comments to explain behaviours you questioned in v7
- make the mutexes un-interruptible
- fixed added the 1s you suggested for the if(period_locked) logic
- added setup of the channel_enabled shadowing
- fixed the period reporting for the negedge == posedge case in
get_state() I had to add the enabled check, as otherwise it broke
setting the period for the first time out of reset.
- added a test for invalid PERIOD_STEPS values, in which case we abort
if we cannot fix the period
Changes from v6:
- Dropped an unused variable that I'd missed
- Actually check the return values of the mutex lock()s
- Re-rebased on -next for the MAINTAINERS patch (again...)
Changes from v5:
- switched to a mutex b/c we must sleep with the lock taken
- simplified the locking in apply() and added locking to get_state()
- reworked apply() as requested
- removed the loop in the period calculation (thanks Uwe!)
- add a copy of the enable registers in the driver to save on reads.
- remove the second (useless) write to sync_update
- added some missing rounding in get_state()
- couple other minor cleanups as requested in:
https://lore.kernel.org/linux-riscv/20220709160206.cw5luo7kxdshoiua@pengutronix.de/
Changes from v4:
- dropped some accidentally added files
Conor Dooley (2):
pwm: add microchip soft ip corePWM driver
MAINTAINERS: add pwm to PolarFire SoC entry
MAINTAINERS | 1 +
drivers/pwm/Kconfig | 10 +
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-microchip-core.c | 389 +++++++++++++++++++++++++++++++
4 files changed, 401 insertions(+)
create mode 100644 drivers/pwm/pwm-microchip-core.c
--
2.38.0
next reply other threads:[~2022-11-10 9:36 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 9:35 Conor Dooley [this message]
2022-11-10 9:35 ` [PATCH v12 1/2] pwm: add microchip soft ip corePWM driver Conor Dooley
2022-11-17 16:49 ` Uwe Kleine-König
2022-11-17 17:38 ` Conor Dooley
2022-11-17 21:04 ` Uwe Kleine-König
2022-11-17 22:03 ` Conor Dooley
2022-11-21 15:29 ` Conor Dooley
2022-11-30 9:53 ` Conor Dooley
2022-11-30 10:37 ` Uwe Kleine-König
2022-11-30 11:15 ` Conor Dooley
2022-12-05 15:21 ` Conor Dooley
2022-12-05 16:03 ` Uwe Kleine-König
2022-12-05 17:13 ` Conor Dooley
2022-12-05 18:13 ` Uwe Kleine-König
2022-11-10 9:35 ` [PATCH v12 2/2] MAINTAINERS: add pwm to PolarFire SoC entry Conor Dooley
2022-11-10 9:38 ` [PATCH v12 0/2] Hey Uwe, all, Conor.Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221110093512.333881-1-conor.dooley@microchip.com \
--to=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=thierry.reding@gmail.com \
--cc=u.kleine-koenig@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®