From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF465C433FE for ; Thu, 17 Nov 2022 17:55:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234944AbiKQRz5 (ORCPT ); Thu, 17 Nov 2022 12:55:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240291AbiKQRzs (ORCPT ); Thu, 17 Nov 2022 12:55:48 -0500 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D6EF7FF2E; Thu, 17 Nov 2022 09:55:48 -0800 (PST) Received: by mail-pg1-x52b.google.com with SMTP id h193so2615344pgc.10; Thu, 17 Nov 2022 09:55:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=1GKnYydXCYqxqW9dR7aXjYaf7V42K6rqe1svrcwQLNA=; b=SsPhA+/zwr2soeEEaWB0iEXVlj2pRXy3T+5MRNkg3gA5bYnDEY76LeiMkjnH6Gtuek VQBK8qn5HlwgpU7JZk31s67cl0oqPFk3/+E+STN+mOv1n0rSuGKwz4ufNl96yyvb+ehm aR16ZhBgByLcqtxYalWYt3DhzqpWD1xk7B/ERhHy5UROjXSA2O4WT484NF1gnxYt2zLo VhlagvXdWvqrnTC1Vpr/nXSDV94IDRsmmPKjuIzbKfxVwlbZ700ttpYm5thGIaufzUrk HWDdterCqcq4ySav4311fVhhOLzfuYpSaYvQzNRfmNvAt+J1fYmNxyHxf+meEu+3PzVd YRFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=1GKnYydXCYqxqW9dR7aXjYaf7V42K6rqe1svrcwQLNA=; b=TkOn/q0TYypgvcItYVwdYw9qRENVqNoMzOyCXJV/l1sjxWsfcAhYbafpwg3gwEyEuX I94sNPdmxKAJQ8P0+6ww9LuTpeJ+o0mzwOOpmmF4pIql8cjSEYYkbSYUWVuK0iT9x3A+ dtFSAgArJE6z8YtbuG0C6n45vmrv7m2Et/fbjI5/8GIMoDLp5jFgv6aaCAMQHysevL8I 5gnVxqD5t0hEWjSUCXnPdOVyfxjsKtSaOBJC33ZIzgAXbfALIFYF76k8F6bo09ynwqw5 fwbUo3jJ5/HdNVkV9MA8SEqCOjTj6P2aJJWfjyN+zZ5P+cjKGnuTyMN8+dGKZu4Ty0xU X71g== X-Gm-Message-State: ANoB5pmldrGwdlerUPJA8ojU7sBUF+DxMpT1LwYQkhxoDiTsVxMIhWTA feqrtWaqwKTsF9uzONXaZBVVoN4Tsy4= X-Google-Smtp-Source: AA0mqf6iXN48y71fjRlt9NKrGMiWHTqJP3NlCcBrojVNFQ5F8Uz85fLyhe10Tsd6646K6iiHVBVGYw== X-Received: by 2002:a63:165d:0:b0:473:f7cd:6603 with SMTP id 29-20020a63165d000000b00473f7cd6603mr3055977pgw.336.1668707747710; Thu, 17 Nov 2022 09:55:47 -0800 (PST) Received: from localhost ([192.55.54.55]) by smtp.gmail.com with ESMTPSA id h4-20020a170902680400b001870dc3b4c0sm1705264plk.74.2022.11.17.09.55.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Nov 2022 09:55:47 -0800 (PST) Date: Thu, 17 Nov 2022 09:55:46 -0800 From: Isaku Yamahata To: "Huang, Kai" Cc: "kvm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Yamahata, Isaku" , "pbonzini@redhat.com" , "Shahar, Sagi" , "Aktas, Erdem" , "isaku.yamahata@gmail.com" , "dmatlack@google.com" , "Christopherson,, Sean" Subject: Re: [PATCH v10 032/108] KVM: x86/mmu: Make sync_page not use hard-coded 0 as the initial SPTE value Message-ID: <20221117175546.GH2350331@ls.amr.corp.intel.com> References: <3f805b540780494c4a5b068287c37e40d71d7ba4.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <3f805b540780494c4a5b068287c37e40d71d7ba4.camel@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 09, 2022 at 11:24:44AM +0000, "Huang, Kai" wrote: > On Sat, 2022-10-29 at 23:22 -0700, isaku.yamahata@intel.com wrote: > > From: Isaku Yamahata > > > > FNAME(sync_page) in arch/x86/kvm/mmu/paging_tmpl.h assumes that the initial > > shadow page table entry (SPTE) is zero. Remove the assumption by using > > SHADOW_NONPRESENT_VALUE that will be updated from 0 to non-zero value. > > > > Signed-off-by: Isaku Yamahata > > --- > > arch/x86/kvm/mmu/paging_tmpl.h | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h > > index 5ab5f94dcb6f..6db3f2b5563a 100644 > > --- a/arch/x86/kvm/mmu/paging_tmpl.h > > +++ b/arch/x86/kvm/mmu/paging_tmpl.h > > @@ -1036,7 +1036,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) > > gpa_t pte_gpa; > > gfn_t gfn; > > > > - if (!sp->spt[i]) > > + /* spt[i] has initial value of shadow page table allocation */ > > + if (sp->spt[i] == SHADOW_NONPRESENT_VALUE) > > continue; > > > > pte_gpa = first_pte_gpa + i * sizeof(pt_element_t); > > I think this patch can be merged to previous one? Looks there's no good reason > to keep it as standalone. Yes, will squash it. -- Isaku Yamahata