From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66AC6C43217 for ; Sat, 19 Nov 2022 17:31:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235010AbiKSRbU (ORCPT ); Sat, 19 Nov 2022 12:31:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234808AbiKSRbH (ORCPT ); Sat, 19 Nov 2022 12:31:07 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53EF117418; Sat, 19 Nov 2022 09:30:52 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2AJHUTve061516; Sat, 19 Nov 2022 11:30:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1668879029; bh=vVyXYYrGImgHeS2T8n3G25Um5AWctifrL3oyuh/mSDc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GJ+wrrwetsff4R+KTE0HJL2jdG7gnA0nVglka44gRUv7X7F6/DdACyOTHLs+zHTtQ C6TO1Z+QcXFEEenLLbTuwywpv8v7YYJvx+iszoXQT3HROcQri4+aWUTCR1bbbC53XT hbOXnYbQjWhJx/oEWri+IrwMAKXv+QOHA5B4RawU= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2AJHUSXg011392 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 19 Nov 2022 11:30:29 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Sat, 19 Nov 2022 11:30:28 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Sat, 19 Nov 2022 11:30:28 -0600 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AJHUROB055715; Sat, 19 Nov 2022 11:30:28 -0600 From: Aradhya Bhatia To: Tomi Valkeinen , Jyri Sarha , Rob Herring , David Airlie , Daniel Vetter , Krzysztof Kozlowski CC: DRI Development List , Devicetree List , Linux Kernel List , Nishanth Menon , Vignesh Raghavendra , Rahul T R , Devarsh Thakkar , Jayesh Choudhary , Aradhya Bhatia Subject: [PATCH v6 5/5] drm/tidss: Enable Dual and Duplicate Modes for OLDI Date: Sat, 19 Nov 2022 23:00:19 +0530 Message-ID: <20221119173019.15643-6-a-bhatia1@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221119173019.15643-1-a-bhatia1@ti.com> References: <20221119173019.15643-1-a-bhatia1@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AM625 DSS IP contains 2 OLDI TXes which can work together to enable 2 cloned displays of or even a single dual-link display with higher resolutions like WUXGA (1920x1200@60fps) with a reduced OLDI clock frequency. Configure the necessary register to enable and disable the OLDI TXes with required modes configurations. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/tidss/tidss_dispc.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index f26129fb1d8f..cf43de6216a5 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -1012,8 +1012,8 @@ static void dispc_enable_oldi(struct dispc_device *dispc, u32 hw_videoport, int count = 0; /* - * For the moment DUALMODESYNC, MASTERSLAVE, MODE, and SRC - * bits of DISPC_VP_DSS_OLDI_CFG are set statically to 0. + * For the moment MASTERSLAVE, and SRC bits of DISPC_VP_DSS_OLDI_CFG are + * always set to 0. */ if (fmt->data_width == 24) @@ -1030,6 +1030,26 @@ static void dispc_enable_oldi(struct dispc_device *dispc, u32 hw_videoport, oldi_cfg |= BIT(0); /* ENABLE */ + switch (dispc->oldi_mode) { + case OLDI_SINGLE_LINK_SINGLE_MODE: + /* All configuration is done for this mode. */ + break; + + case OLDI_SINGLE_LINK_CLONE_MODE: + oldi_cfg |= BIT(5); /* CLONE MODE */ + break; + + case OLDI_DUAL_LINK_MODE: + oldi_cfg |= BIT(11); /* DUALMODESYNC */ + oldi_cfg |= BIT(3); /* data-mapping field also indicates dual-link mode */ + break; + + default: + dev_warn(dispc->dev, "%s: Incorrect oldi mode. Returning.\n", + __func__); + return; + } + dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, oldi_cfg); while (!(oldi_reset_bit & dispc_read(dispc, DSS_SYSSTATUS)) && -- 2.38.1