From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDB4FC4332F for ; Mon, 28 Nov 2022 17:39:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233153AbiK1Rjk (ORCPT ); Mon, 28 Nov 2022 12:39:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233095AbiK1Rix (ORCPT ); Mon, 28 Nov 2022 12:38:53 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E664927FEC; Mon, 28 Nov 2022 09:38:33 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 459AB60E84; Mon, 28 Nov 2022 17:38:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6368AC433C1; Mon, 28 Nov 2022 17:38:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669657112; bh=yHbMGquTZpBdGaMsjnRtRspLMqIM4gl7RM/XsSw8k/g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mb8bqsrpPxrYQh1PMuG86LjFlfksUMZVxTpngw2PGdzov1RmeJYaNL70jHaB5BLDh A1+4wweHQcDlDL3dTO+uL/Tpvfz56xt+W+XSGCZrqlNJvu7jY9k8AvU96k4cLdxTLP mZInO1ksFxaHM27aP8tNAYsob+RwP28reH8VIrzeZiyj8ySy8CSxnrracxrojm9Y6y Qr6YF+hQ4DBlHakjI1UakG0AEEcN3lG4qmCjEJCvT2uA451qLcaO1EFETOBP9T5R24 POCfnpoyno5YopAeYQQy5f5TzGEfbAYqjHYCXVJJ/EU047vNSxa8w5FWvaDIPY/xhO IQo3+oFuFi9Hg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Chancel Liu , Charles Keepax , Mark Brown , Sasha Levin , lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, steve@sk2.org, chi.minghao@zte.com.cn, aford173@gmail.com, patches@opensource.cirrus.com, alsa-devel@alsa-project.org Subject: [PATCH AUTOSEL 6.0 16/39] ASoC: wm8962: Wait for updated value of WM8962_CLOCKING1 register Date: Mon, 28 Nov 2022 12:35:56 -0500 Message-Id: <20221128173642.1441232-16-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221128173642.1441232-1-sashal@kernel.org> References: <20221128173642.1441232-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chancel Liu [ Upstream commit 3ca507bf99611c82dafced73e921c1b10ee12869 ] DSPCLK_DIV field in WM8962_CLOCKING1 register is used to generate correct frequency of LRCLK and BCLK. Sometimes the read-only value can't be updated timely after enabling SYSCLK. This results in wrong calculation values. Delay is introduced here to wait for newest value from register. The time of the delay should be at least 500~1000us according to test. Signed-off-by: Chancel Liu Acked-by: Charles Keepax Link: https://lore.kernel.org/r/20221109121354.123958-1-chancel.liu@nxp.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/codecs/wm8962.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 6df06fba4377..ee1cad5af535 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -2503,6 +2503,14 @@ static void wm8962_configure_bclk(struct snd_soc_component *component) snd_soc_component_update_bits(component, WM8962_CLOCKING2, WM8962_SYSCLK_ENA_MASK, WM8962_SYSCLK_ENA); + /* DSPCLK_DIV field in WM8962_CLOCKING1 register is used to generate + * correct frequency of LRCLK and BCLK. Sometimes the read-only value + * can't be updated timely after enabling SYSCLK. This results in wrong + * calculation values. Delay is introduced here to wait for newest + * value from register. The time of the delay should be at least + * 500~1000us according to test. + */ + usleep_range(500, 1000); dspclk = snd_soc_component_read(component, WM8962_CLOCKING1); if (snd_soc_component_get_bias_level(component) != SND_SOC_BIAS_ON) -- 2.35.1