From: Robert Foss <robert.foss@linaro.org>
To: andrzej.hajda@intel.com, neil.armstrong@linaro.org,
robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com,
jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com,
daniel@ffwll.ch, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org,
Amit Pundir <amit.pundir@linaro.org>
Subject: [PATCH v1] drm/bridge: lt9611: Fix PLL being unable to lock
Date: Tue, 13 Dec 2022 16:03:04 +0100 [thread overview]
Message-ID: <20221213150304.4189760-1-robert.foss@linaro.org> (raw)
This fixes PLL being unable to lock, and is derived from an equivalent
downstream commit.
Available LT9611 documentation does not list this register, neither does
LT9611UXC (which is a different chip).
This commit has been confirmed to fix HDMI output on DragonBoard 845c.
Suggested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
---
drivers/gpu/drm/bridge/lontium-lt9611.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c b/drivers/gpu/drm/bridge/lontium-lt9611.c
index ffcdc8dba3798..3ce4e495aee50 100644
--- a/drivers/gpu/drm/bridge/lontium-lt9611.c
+++ b/drivers/gpu/drm/bridge/lontium-lt9611.c
@@ -259,6 +259,7 @@ static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode
{ 0x8126, 0x55 },
{ 0x8127, 0x66 },
{ 0x8128, 0x88 },
+ { 0x812a, 0x20 },
};
regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
--
2.34.1
next reply other threads:[~2022-12-13 15:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-13 15:03 Robert Foss [this message]
2022-12-13 16:46 ` Amit Pundir
2022-12-15 10:26 ` Robert Foss
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