From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 9/9] MAINTAINERS: Add entry for RISC-V AIA drivers
Date: Tue, 3 Jan 2023 19:44:09 +0530 [thread overview]
Message-ID: <20230103141409.772298-10-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230103141409.772298-1-apatel@ventanamicro.com>
Add myself as maintainer for RISC-V AIA drivers including the
RISC-V INTC driver which supports both AIA and non-AIA platforms.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
MAINTAINERS | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7f86d02cb427..c5b8eda0780e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17942,6 +17942,18 @@ F: drivers/perf/riscv_pmu.c
F: drivers/perf/riscv_pmu_legacy.c
F: drivers/perf/riscv_pmu_sbi.c
+RISC-V AIA DRIVERS
+M: Anup Patel <anup@brainfault.org>
+L: linux-riscv@lists.infradead.org
+S: Maintained
+F: Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
+F: Documentation/devicetree/bindings/interrupt-controller/riscv,imsic.yaml
+F: drivers/irqchip/irq-riscv-aplic.c
+F: drivers/irqchip/irq-riscv-imsic.c
+F: drivers/irqchip/irq-riscv-intc.c
+F: include/linux/irqchip/riscv-aplic.h
+F: include/linux/irqchip/riscv-imsic.h
+
RISC-V ARCHITECTURE
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@dabbelt.com>
--
2.34.1
prev parent reply other threads:[~2023-01-03 14:23 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-03 14:14 [PATCH v2 0/9] Linux RISC-V AIA Support Anup Patel
2023-01-03 14:14 ` [PATCH v2 1/9] RISC-V: Add AIA related CSR defines Anup Patel
2023-01-04 23:07 ` Conor Dooley
2023-01-09 5:09 ` Anup Patel
2023-01-17 20:42 ` Conor Dooley
2023-01-27 11:58 ` Anup Patel
2023-01-27 14:20 ` Conor Dooley
2023-01-03 14:14 ` [PATCH v2 2/9] RISC-V: Detect AIA CSRs from ISA string Anup Patel
2023-01-03 14:14 ` [PATCH v2 3/9] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-01-13 9:39 ` Marc Zyngier
2023-01-03 14:14 ` [PATCH v2 4/9] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-01-04 23:21 ` Conor Dooley
2023-02-20 3:15 ` Anup Patel
2023-01-12 20:49 ` Rob Herring
2023-02-20 3:20 ` Anup Patel
2023-02-19 11:17 ` Vivian Wang
2023-02-20 3:31 ` Anup Patel
2023-01-03 14:14 ` [PATCH v2 5/9] irqchip: Add RISC-V incoming MSI controller driver Anup Patel
2023-01-13 10:10 ` Marc Zyngier
2023-05-01 8:28 ` Anup Patel
2023-05-01 8:44 ` Marc Zyngier
[not found] ` <CAPqJEFqhd-=-RYepKqnco7HySoxk7AhEctL+vzNozMSWe0mv7A@mail.gmail.com>
[not found] ` <CABvJ_xhcuC92A_oo1mWQoRvtRzE8XXx9bbXKs7N7wKm0=Z3_Cw@mail.gmail.com>
2023-01-18 3:49 ` Fwd: " Vincent Chen
2023-01-18 4:20 ` Anup Patel
2023-01-03 14:14 ` [PATCH v2 6/9] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-01-04 22:16 ` Conor Dooley
2023-02-20 4:36 ` Anup Patel
2023-02-20 10:32 ` Conor Dooley
2023-02-20 10:56 ` Conor Dooley
2023-01-12 21:02 ` Rob Herring
2023-02-19 11:48 ` Vivian Wang
2023-02-20 5:09 ` Anup Patel
2023-01-03 14:14 ` [PATCH v2 7/9] irqchip: Add RISC-V advanced PLIC driver Anup Patel
[not found] ` <CAPqJEFpmAvWiOdackxYwSPBfjo4DnTHXrXVSCC4snMn8tnZXPw@mail.gmail.com>
[not found] ` <CABvJ_xhjMa8xTsO-Qa23TOqxPpYxyBYSfV6TmKney-Gp3oi8cA@mail.gmail.com>
2023-01-17 7:09 ` Fwd: " Vincent Chen
2023-01-18 4:37 ` Anup Patel
2023-01-03 14:14 ` [PATCH v2 8/9] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-01-03 14:14 ` Anup Patel [this message]
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