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From: Kim Phillips <kim.phillips@amd.com>
To: <x86@kernel.org>
Cc: Kim Phillips <kim.phillips@amd.com>,
	Borislav Petkov <bp@alien8.de>,
	"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
	Joao Martins <joao.m.martins@oracle.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	David Woodhouse <dwmw@amazon.co.uk>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Juergen Gross <jgross@suse.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Tony Luck <tony.luck@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	"Alexey Kardashevskiy" <aik@amd.com>, <kvm@vger.kernel.org>,
	<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v8 3/8] x86/cpu, kvm: Add the NO_NESTED_DATA_BP feature
Date: Mon, 23 Jan 2023 16:56:55 -0600	[thread overview]
Message-ID: <20230123225700.2224063-4-kim.phillips@amd.com> (raw)
In-Reply-To: <20230123225700.2224063-1-kim.phillips@amd.com>

The "Processor ignores nested data breakpoints" feature was being
open-coded for KVM.  Add the feature to its newly introduced
CPUID leaf 0x80000021 EAX proper.

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
---
 arch/x86/include/asm/cpufeatures.h | 3 +++
 arch/x86/kvm/cpuid.c               | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index a84536876794..7f0fb894e432 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -428,6 +428,9 @@
 #define X86_FEATURE_V_TSC_AUX		(19*32+ 9) /* "" Virtual TSC_AUX */
 #define X86_FEATURE_SME_COHERENT	(19*32+10) /* "" AMD hardware-enforced cache coherency */
 
+/* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */
+#define X86_FEATURE_NO_NESTED_DATA_BP	(20*32+ 0) /* "" No Nested Data Breakpoints */
+
 /*
  * BUG word(s)
  */
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 3930452bf06e..13bd2769fa5a 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -742,7 +742,7 @@ void kvm_set_cpu_caps(void)
 		F(SME_COHERENT));
 
 	kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
-		BIT(0) /* NO_NESTED_DATA_BP */ | 0 /* SmmPgCfgLock */ |
+		F(NO_NESTED_DATA_BP) | 0 /* SmmPgCfgLock */ |
 		BIT(6) /* NULL_SEL_CLR_BASE */ | 0 /* PrefetchCtlMsr */
 	);
 	if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC))
-- 
2.34.1


  parent reply	other threads:[~2023-01-23 22:58 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-23 22:56 [PATCH v8 0/8] x86/cpu, kvm: Support AMD Automatic IBRS Kim Phillips
2023-01-23 22:56 ` [PATCH v8 1/8] x86/cpu, kvm: Add support for CPUID_80000021_EAX Kim Phillips
2023-01-23 23:54   ` Sean Christopherson
2023-01-23 22:56 ` [PATCH v8 2/8] x86/cpu, kvm: Move open-coded cpuid leaf 0x80000021 EAX bit propagation code Kim Phillips
2023-01-24  1:14   ` Sean Christopherson
2023-01-23 22:56 ` Kim Phillips [this message]
2023-01-23 22:56 ` [PATCH v8 4/8] x86/cpu, kvm: Move X86_FEATURE_LFENCE_RDTSC to its native leaf Kim Phillips
2023-01-24  1:17   ` Sean Christopherson
2023-01-23 22:56 ` [PATCH v8 5/8] x86/cpu, kvm: Add the Null Selector Clears Base feature Kim Phillips
2023-01-23 22:56 ` [PATCH v8 6/8] x86/cpu, kvm: Add the SMM_CTL MSR not present feature Kim Phillips
2023-01-23 22:56 ` [PATCH v8 7/8] x86/cpu: Support AMD Automatic IBRS Kim Phillips
2023-01-23 22:57 ` [PATCH v8 8/8] x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest Kim Phillips
2023-01-24  1:18 ` [PATCH v8 0/8] x86/cpu, kvm: Support AMD Automatic IBRS Sean Christopherson

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