From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de,
mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk
Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel@collabora.com,
Benjamin Gaignard <benjamin.gaignard@collabora.com>,
Nicolas Dufresne <nicolas.dufresne@collabora.com>
Subject: [PATCH v6 5/5] media: verisilicon: HEVC: Only propose 10 bitscompatible pixels formats
Date: Mon, 30 Jan 2023 14:58:02 +0100 [thread overview]
Message-ID: <20230130135802.744743-6-benjamin.gaignard@collabora.com> (raw)
In-Reply-To: <20230130135802.744743-1-benjamin.gaignard@collabora.com>
When decoding a 10bits bitstreams HEVC driver should only expose
10bits pixel formats.
To fulfill this requirement it is needed to call hantro_reset_raw_fmt()
when bit depth change and to correctly set match_depth in pixel formats
enumeration.
Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
---
drivers/media/platform/verisilicon/hantro_drv.c | 16 ++++++++++++++--
.../media/platform/verisilicon/imx8m_vpu_hw.c | 2 ++
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
index 715075f15596..e3656649c717 100644
--- a/drivers/media/platform/verisilicon/hantro_drv.c
+++ b/drivers/media/platform/verisilicon/hantro_drv.c
@@ -331,8 +331,20 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
switch (ctrl->id) {
case V4L2_CID_STATELESS_HEVC_SPS:
- ctx->bit_depth = ctrl->p_new.p_hevc_sps->bit_depth_luma_minus8 + 8;
- break;
+ {
+ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
+ int bit_depth = sps->bit_depth_luma_minus8 + 8;
+ int ret;
+
+ if (ctx->bit_depth == bit_depth)
+ return 0;
+
+ ret = hantro_reset_raw_fmt(ctx, bit_depth);
+ if (!ret)
+ ctx->bit_depth = bit_depth;
+
+ return ret;
+ }
default:
return -EINVAL;
}
diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
index b390228fd3b4..f850d8bddef6 100644
--- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
+++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
@@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
.codec_mode = HANTRO_MODE_NONE,
+ .match_depth = true,
.postprocessed = true,
.frmsize = {
.min_width = FMT_MIN_WIDTH,
@@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_P010,
.codec_mode = HANTRO_MODE_NONE,
+ .match_depth = true,
.postprocessed = true,
.frmsize = {
.min_width = FMT_MIN_WIDTH,
--
2.34.1
prev parent reply other threads:[~2023-01-30 13:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-30 13:57 [PATCH v6 0/5] media: verisilicon: HEVC: fix 10bits handling Benjamin Gaignard
2023-01-30 13:57 ` [PATCH v6 1/5] media: verisilicon: Do not set context src/dst formats in reset functions Benjamin Gaignard
2023-01-30 13:57 ` [PATCH v6 2/5] media: verisilicon: Do not use ctx fields as format storage when resetting Benjamin Gaignard
2023-01-30 13:58 ` [PATCH v6 3/5] media: verisilicon: Do not set ctx->bit_depth in hantro_try_ctrl() Benjamin Gaignard
2023-01-30 16:07 ` kernel test robot
2023-02-02 21:51 ` kernel test robot
2023-01-30 13:58 ` [PATCH v6 4/5] media: verisilicon: Do not change context bit depth before validating the format Benjamin Gaignard
2023-01-31 11:56 ` Ezequiel Garcia
2023-01-30 13:58 ` Benjamin Gaignard [this message]
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