From: Atish Patra <atishp@rivosinc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atishp@rivosinc.com>,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH v6 4/8] RISC-V: KVM: Disable all hpmcounter access for VS/VU mode
Date: Tue, 7 Feb 2023 01:55:25 -0800 [thread overview]
Message-ID: <20230207095529.1787260-5-atishp@rivosinc.com> (raw)
In-Reply-To: <20230207095529.1787260-1-atishp@rivosinc.com>
Any guest must not get access to any hpmcounter including cycle/instret
without any checks. We achieve that by disabling all the bits except TM
bit in hcounteren.
However, instret and cycle access for guest user space can be enabled
upon explicit request (via ONE REG) or on first trap from VU mode
to maintain ABI requirement in the future. This patch doesn't support
that as ONE REG interface is not settled yet.
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
arch/riscv/kvm/main.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c
index 58c5489..c5d400f 100644
--- a/arch/riscv/kvm/main.c
+++ b/arch/riscv/kvm/main.c
@@ -49,7 +49,8 @@ int kvm_arch_hardware_enable(void)
hideleg |= (1UL << IRQ_VS_EXT);
csr_write(CSR_HIDELEG, hideleg);
- csr_write(CSR_HCOUNTEREN, -1UL);
+ /* VS should access only the time counter directly. Everything else should trap */
+ csr_write(CSR_HCOUNTEREN, 0x02);
csr_write(CSR_HVIP, 0);
--
2.25.1
next prev parent reply other threads:[~2023-02-07 9:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-07 9:55 [PATCH v6 0/8] KVM perf support Atish Patra
2023-02-07 9:55 ` [PATCH v6 1/8] RISC-V: KVM: Add skeleton support for perf Atish Patra
2023-02-07 10:37 ` Andrew Jones
2023-02-07 14:57 ` Anup Patel
2023-02-07 9:55 ` [PATCH v6 2/8] RISC-V: KVM: Add SBI PMU extension support Atish Patra
2023-02-07 10:43 ` Andrew Jones
2023-02-07 14:57 ` Anup Patel
2023-02-07 9:55 ` [PATCH v6 3/8] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Atish Patra
2023-02-07 9:55 ` Atish Patra [this message]
2023-02-07 9:55 ` [PATCH v6 5/8] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra
2023-02-07 9:55 ` [PATCH v6 6/8] RISC-V: KVM: Implement perf support without sampling Atish Patra
2023-02-07 9:55 ` [PATCH v6 7/8] RISC-V: KVM: Support firmware events Atish Patra
2023-02-07 9:55 ` [PATCH v6 8/8] RISC-V: KVM: Increment firmware pmu events Atish Patra
2023-02-07 14:58 ` [PATCH v6 0/8] KVM perf support Anup Patel
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