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From: Linus Walleij <linus.walleij@linaro.org>
To: Mun Yew Tham <mun.yew.tham@intel.com>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
	Alban Bedel <albeu@free.fr>, Orson Zhai <orsonzhai@gmail.com>,
	Baolin Wang <baolin.wang@linux.alibaba.com>,
	Chunyan Zhang <zhang.lyra@gmail.com>,
	Jay Fang <f.fangjian@huawei.com>,
	Daniel Palmer <daniel@thingy.jp>,
	Romain Perier <romain.perier@gmail.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Kevin Hilman <khilman@kernel.org>,
	William Breathitt Gray <william.gray@linaro.org>
Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org,
	Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH v3 03/17] gpio: aspeed: Always register the irqchip
Date: Thu, 09 Mar 2023 08:45:51 +0100	[thread overview]
Message-ID: <20230215-immutable-chips-v3-3-972542092a77@linaro.org> (raw)
In-Reply-To: <20230215-immutable-chips-v3-0-972542092a77@linaro.org>

From: Joel Stanley <joel@jms.id.au>

The driver was implemented in a way that made the irqchip optional, if a
irq was not present in the device tree. However, all of the device trees
have always had an irq, so the optional-ness has never been used.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/gpio/gpio-aspeed.c | 49 ++++++++++++++++++++++------------------------
 1 file changed, 23 insertions(+), 26 deletions(-)

diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index a94da80d3a95..129f6a6b4d1d 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -1137,8 +1137,9 @@ MODULE_DEVICE_TABLE(of, aspeed_gpio_of_table);
 static int __init aspeed_gpio_probe(struct platform_device *pdev)
 {
 	const struct of_device_id *gpio_id;
+	struct gpio_irq_chip *girq;
 	struct aspeed_gpio *gpio;
-	int rc, i, banks, err;
+	int rc, irq, i, banks, err;
 	u32 ngpio;
 
 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
@@ -1201,31 +1202,27 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
 		aspeed_gpio_change_cmd_source(gpio, bank, 3, GPIO_CMDSRC_ARM);
 	}
 
-	/* Optionally set up an irqchip if there is an IRQ */
-	rc = platform_get_irq(pdev, 0);
-	if (rc > 0) {
-		struct gpio_irq_chip *girq;
-
-		gpio->irq = rc;
-		girq = &gpio->chip.irq;
-		girq->chip = &gpio->irqc;
-		girq->chip->name = dev_name(&pdev->dev);
-		girq->chip->irq_ack = aspeed_gpio_irq_ack;
-		girq->chip->irq_mask = aspeed_gpio_irq_mask;
-		girq->chip->irq_unmask = aspeed_gpio_irq_unmask;
-		girq->chip->irq_set_type = aspeed_gpio_set_type;
-		girq->parent_handler = aspeed_gpio_irq_handler;
-		girq->num_parents = 1;
-		girq->parents = devm_kcalloc(&pdev->dev, 1,
-					     sizeof(*girq->parents),
-					     GFP_KERNEL);
-		if (!girq->parents)
-			return -ENOMEM;
-		girq->parents[0] = gpio->irq;
-		girq->default_type = IRQ_TYPE_NONE;
-		girq->handler = handle_bad_irq;
-		girq->init_valid_mask = aspeed_init_irq_valid_mask;
-	}
+	/* Set up an irqchip */
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0)
+		return irq;
+	gpio->irq = irq;
+	girq = &gpio->chip.irq;
+	girq->chip = &gpio->irqc;
+	girq->chip->name = dev_name(&pdev->dev);
+	girq->chip->irq_ack = aspeed_gpio_irq_ack;
+	girq->chip->irq_mask = aspeed_gpio_irq_mask;
+	girq->chip->irq_unmask = aspeed_gpio_irq_unmask;
+	girq->chip->irq_set_type = aspeed_gpio_set_type;
+	girq->parent_handler = aspeed_gpio_irq_handler;
+	girq->num_parents = 1;
+	girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), GFP_KERNEL);
+	if (!girq->parents)
+		return -ENOMEM;
+	girq->parents[0] = gpio->irq;
+	girq->default_type = IRQ_TYPE_NONE;
+	girq->handler = handle_bad_irq;
+	girq->init_valid_mask = aspeed_init_irq_valid_mask;
 
 	gpio->offset_timer =
 		devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL);

-- 
2.34.1


  parent reply	other threads:[~2023-03-09  7:46 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-09  7:45 [PATCH v3 00/17] Mass convert GPIO IRQ chips to be immutable Linus Walleij
2023-03-09  7:45 ` [PATCH v3 01/17] gpio: altera: Convert to immutable irq_chip Linus Walleij
2023-03-09  7:45 ` [PATCH v3 02/17] gpio: adnp: " Linus Walleij
2023-03-09  7:45 ` Linus Walleij [this message]
2023-03-09  7:45 ` [PATCH v3 04/17] gpio: aspeed: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 05/17] gpio: aspeed-sgpio: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 06/17] gpio: ath79: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 07/17] gpio: cadence: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 08/17] gpio: hisi: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 09/17] gpio: hlwd: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 10/17] gpio: idt3243x: " Linus Walleij
2023-03-09  7:45 ` [PATCH v3 11/17] gpio: msc313: " Linus Walleij
2023-03-10  8:06   ` Romain Perier
2023-03-09  7:46 ` [PATCH v3 12/17] gpio: mlxbf2: " Linus Walleij
2023-03-09  7:46 ` [PATCH v3 13/17] gpio: max732x: " Linus Walleij
2023-03-09  7:46 ` [PATCH v3 14/17] gpio: omap: Drop irq_base Linus Walleij
2023-03-09  7:46 ` [PATCH v3 15/17] gpio: omap: Convert to immutable irq_chip Linus Walleij
2023-03-09  7:46 ` [PATCH v3 16/17] gpio: pci-idio-16: " Linus Walleij
2023-03-09  7:46 ` [PATCH v3 17/17] gpio: pcie-idio-24: " Linus Walleij
2023-03-10 15:25 ` [PATCH v3 00/17] Mass convert GPIO IRQ chips to be immutable Bartosz Golaszewski
2023-03-10 22:44   ` Linus Walleij

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