From: arinc9.unal@gmail.com
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
John Crispin <john@phrozen.org>
Cc: "Arınç ÜNAL" <arinc.unal@arinc9.com>,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
"Sergio Paracuellos" <sergio.paracuellos@gmail.com>,
erkin.bozoglu@xeront.com
Subject: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL
Date: Tue, 21 Feb 2023 12:24:35 +0300 [thread overview]
Message-ID: <20230221092435.22069-2-arinc.unal@arinc9.com> (raw)
In-Reply-To: <20230221092435.22069-1-arinc.unal@arinc9.com>
From: Arınç ÜNAL <arinc.unal@arinc9.com>
Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
uses pinctrl. Because of this, PINCTRL is not selected at all. Make
SOC_MT7621 select PINCTRL.
Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
the PINCTRL_MT7621 option.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
arch/mips/ralink/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 06031796c87b..83e61e147b90 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -54,7 +54,7 @@ choice
select HAVE_PCI
select PCI_DRIVERS_GENERIC
select SOC_BUS
- select PINCTRL_MT7621
+ select PINCTRL
help
The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
--
2.37.2
next prev parent reply other threads:[~2023-02-21 9:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-21 9:24 [PATCH 1/2] mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK arinc9.unal
2023-02-21 9:24 ` arinc9.unal [this message]
2023-02-21 9:38 ` [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL Sergio Paracuellos
2023-02-21 10:09 ` Arınç ÜNAL
2023-02-21 10:21 ` Sergio Paracuellos
2023-02-21 10:54 ` Arınç ÜNAL
2023-02-21 15:33 ` Sergio Paracuellos
2023-02-27 22:55 ` Thomas Bogendoerfer
2023-02-21 15:34 ` [PATCH 1/2] mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK Sergio Paracuellos
2023-02-27 22:55 ` Thomas Bogendoerfer
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