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From: James Clark <james.clark@arm.com>
To: coresight@lists.linaro.org
Cc: James Clark <james.clark@arm.com>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 7/9] coresight: Refactor out buffer allocation function for ETR
Date: Fri, 10 Mar 2023 16:06:06 +0000	[thread overview]
Message-ID: <20230310160610.742382-8-james.clark@arm.com> (raw)
In-Reply-To: <20230310160610.742382-1-james.clark@arm.com>

When CATU is moved to the generic enable/disable path system in the
next commit, it will need to call into ETR and get it to pre-allocate
its buffer so add a function for it.

No functional changes

Signed-off-by: James Clark <james.clark@arm.com>
---
 .../hwtracing/coresight/coresight-tmc-etr.c   | 50 ++++++++++++++++---
 drivers/hwtracing/coresight/coresight-tmc.h   |  2 +
 2 files changed, 45 insertions(+), 7 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 223081dc3ad4..cb9621003aef 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1169,7 +1169,7 @@ void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
 	drvdata->etr_buf = NULL;
 }
 
-static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
+static struct etr_buf *tmc_etr_get_sysfs_buffer(struct coresight_device *csdev)
 {
 	int ret = 0;
 	unsigned long flags;
@@ -1192,7 +1192,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
 		/* Allocate memory with the locks released */
 		free_buf = new_buf = tmc_etr_setup_sysfs_buf(drvdata);
 		if (IS_ERR(new_buf))
-			return PTR_ERR(new_buf);
+			return new_buf;
 
 		/* Let's try again */
 		spin_lock_irqsave(&drvdata->spinlock, flags);
@@ -1223,17 +1223,33 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
 		drvdata->sysfs_buf = new_buf;
 	}
 
-	ret = tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf);
-	if (!ret) {
-		drvdata->mode = CS_MODE_SYSFS;
-		atomic_inc(csdev->refcnt);
-	}
 out:
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
 	/* Free memory outside the spinlock if need be */
 	if (free_buf)
 		tmc_etr_free_sysfs_buf(free_buf);
+	return ret ? ERR_PTR(ret) : drvdata->sysfs_buf;
+}
+
+static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
+{
+	int ret;
+	unsigned long flags;
+	struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+	struct etr_buf *sysfs_buf = tmc_etr_get_sysfs_buffer(csdev);
+
+	if (IS_ERR(sysfs_buf))
+		return PTR_ERR(sysfs_buf);
+
+	spin_lock_irqsave(&drvdata->spinlock, flags);
+	ret = tmc_etr_enable_hw(drvdata, sysfs_buf);
+	if (!ret) {
+		drvdata->mode = CS_MODE_SYSFS;
+		atomic_inc(csdev->refcnt);
+	}
+
+	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
 	if (!ret)
 		dev_dbg(&csdev->dev, "TMC-ETR enabled\n");
@@ -1241,6 +1257,26 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
 	return ret;
 }
 
+struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev,
+				   enum cs_mode mode, void *data)
+{
+	struct perf_output_handle *handle = data;
+	struct etr_perf_buffer *etr_perf;
+
+	switch (mode) {
+	case CS_MODE_SYSFS:
+		return tmc_etr_get_sysfs_buffer(csdev);
+	case CS_MODE_PERF:
+		etr_perf = etm_perf_sink_config(handle);
+		if (WARN_ON(!etr_perf || !etr_perf->etr_buf))
+			return ERR_PTR(-EINVAL);
+		return etr_perf->etr_buf;
+	default:
+		return ERR_PTR(-EINVAL);
+	}
+}
+EXPORT_SYMBOL_GPL(tmc_etr_get_buffer);
+
 /*
  * alloc_etr_buf: Allocate ETR buffer for use by perf.
  * The size of the hardware buffer is dependent on the size configured
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index 01c0382a29c0..b97da39652d2 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -332,5 +332,7 @@ struct coresight_device *tmc_etr_get_catu_device(struct tmc_drvdata *drvdata);
 
 void tmc_etr_set_catu_ops(const struct etr_buf_operations *catu);
 void tmc_etr_remove_catu_ops(void);
+struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev,
+				   enum cs_mode mode, void *data);
 
 #endif
-- 
2.34.1


  parent reply	other threads:[~2023-03-10 16:36 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-10 16:05 [PATCH v2 0/9] coresight: Fix CTI module refcount leak by making it a helper device James Clark
2023-03-10 16:06 ` [PATCH v2 1/9] coresight: Use enum type for cs_mode wherever possible James Clark
2023-03-16 16:47   ` Suzuki K Poulose
2023-03-21 15:12     ` Mike Leach
2023-03-10 16:06 ` [PATCH v2 2/9] coresight: Change name of pdata->conns James Clark
2023-03-16 17:17   ` Suzuki K Poulose
2023-03-21 15:12     ` Mike Leach
2023-03-10 16:06 ` [PATCH v2 3/9] coresight: Rename nr_outports to nr_outconns James Clark
2023-03-16 17:18   ` Suzuki K Poulose
2023-03-21 17:33     ` Mike Leach
2023-03-10 16:06 ` [PATCH v2 4/9] coresight: Rename connection members to allow for input connections James Clark
2023-03-21 17:33   ` Mike Leach
2023-03-10 16:06 ` [PATCH v2 5/9] coresight: Dynamically add connections James Clark
2023-03-16 17:12   ` Suzuki K Poulose
2023-03-21 17:56     ` Mike Leach
2023-03-23 10:49       ` James Clark
2023-03-29 12:02     ` James Clark
2023-03-10 16:06 ` [PATCH v2 6/9] coresight: Store in-connections as well as out-connections James Clark
2023-03-14  5:35   ` Jinlong Mao
2023-03-29 12:06     ` James Clark
2023-03-16 20:23   ` Suzuki K Poulose
2023-03-21 17:56     ` Mike Leach
2023-03-29 11:59     ` James Clark
2023-03-10 16:06 ` James Clark [this message]
2023-03-21 18:01   ` [PATCH v2 7/9] coresight: Refactor out buffer allocation function for ETR Mike Leach
2023-03-10 16:06 ` [PATCH v2 8/9] coresight: Enable and disable helper devices adjacent to the path James Clark
2023-03-17 11:04   ` Suzuki K Poulose
2023-03-22  9:29     ` Mike Leach
2023-03-29 12:04     ` James Clark
2023-03-29 13:23       ` Suzuki K Poulose
2023-03-29 14:10         ` James Clark
2023-03-10 16:06 ` [PATCH v2 9/9] coresight: Fix CTI module refcount leak by making it a helper device James Clark
2023-03-17 11:40   ` Suzuki K Poulose
2023-03-22  9:29   ` Mike Leach
2023-03-21 15:12 ` [PATCH v2 0/9] " Mike Leach
2023-03-22  9:26   ` James Clark
     [not found]     ` <CAJ9a7VgbehyFVF1PUZSSGVzhdSY083AvN0bC2xKH=JEUp8oVbw@mail.gmail.com>
2023-03-22 17:18       ` James Clark

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