From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69ED0C6FD1C for ; Sun, 26 Mar 2023 18:14:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231740AbjCZSOS (ORCPT ); Sun, 26 Mar 2023 14:14:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231737AbjCZSOI (ORCPT ); Sun, 26 Mar 2023 14:14:08 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7FE874494; Sun, 26 Mar 2023 11:13:39 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32QFk9PD018296; Sun, 26 Mar 2023 11:13:29 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=g/6c23UcmUdzhzNLKqF3fKU9v4YadyrWid9pKjlYVD8=; b=bfMnQVn+d7Qn7bEUhkJweVj5tfiYbbaUKVUPiHJrOHE5yopdrAsEWHvY+hfhypo3RC1M cFFL5hQXROFHn2mdwSTKksvCbJgfM5fL+bpPmQ05JZCqXhaRBDfFnJugY+uwtBrhMtLU 9zRKsDwO9MpDU/7NbC3FG22vBbKeWg5fhnOcOQ6erRe5NuJs+XLU87AkZwzZFbdPKott eH7tg2gsq45uujisGH5zw+J7dhmrfGW5xefJN6A7tDBXKG/sVt3Q9Y45kOP2qWgZwnMo N1xJeArxCbJ0Rg3EJkTFNaBBc44opi9EzW/gYHobaMraAsgK8Nxxa2TQrPhDrhF0PY3E 0A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3phxas3uff-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 26 Mar 2023 11:13:28 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sun, 26 Mar 2023 11:13:26 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sun, 26 Mar 2023 11:13:26 -0700 Received: from hyd1soter3.marvell.com (unknown [10.29.37.12]) by maili.marvell.com (Postfix) with ESMTP id B1A613F7098; Sun, 26 Mar 2023 11:13:21 -0700 (PDT) From: Hariprasad Kelam To: , CC: , , , , , , , , , , , , , , , , Subject: [net-next Patch v5 6/6] docs: octeontx2: Add Documentation for QOS Date: Sun, 26 Mar 2023 23:42:45 +0530 Message-ID: <20230326181245.29149-7-hkelam@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230326181245.29149-1-hkelam@marvell.com> References: <20230326181245.29149-1-hkelam@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: R3KdvTLX5Lucxy155TfL13sJNoILWxRI X-Proofpoint-ORIG-GUID: R3KdvTLX5Lucxy155TfL13sJNoILWxRI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-24_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add QOS example configuration along with tc-htb commands Signed-off-by: Hariprasad Kelam --- .../ethernet/marvell/octeontx2.rst | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst index 5ba9015336e2..eca4309964c8 100644 --- a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst +++ b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst @@ -13,6 +13,7 @@ Contents - `Drivers`_ - `Basic packet flow`_ - `Devlink health reporters`_ +- `Quality of service`_ Overview ======== @@ -287,3 +288,41 @@ For example:: NIX_AF_ERR: NIX Error Interrupt Reg : 64 Rx on unmapped PF_FUNC + + +Quality of service +================== + +octeontx2 silicon and CN10K transmit interface consists of five transmit levels starting from SMQ/MDQ, TL4 to TL1. +The hardware uses the below algorithms depending on the priority of scheduler queues + +1. Strict Priority + + - Once packets are submitted to MDQ, hardware picks all active MDQs having different priority + using strict priority. + +2. Round Robin + + - Active MDQs having the same priority level are chosen using round robin. + +3. Each packet will traverse MDQ, TL4 to TL1 levels. Each level contains an array of queues to support scheduling and + shaping. + +4. once the user creates tc classes with different priority + + - Driver configures schedulers allocated to the class with specified priority along with rate-limiting configuration. + +5. Enable HW TC offload on the interface:: + + # ethtool -K hw-tc-offload on + +6. Crate htb root:: + + # tc qdisc add dev clsact + # tc qdisc replace dev root handle 1: htb offload + +7. Create tc classes with different priorities:: + + # tc class add dev parent 1: classid 1:1 htb rate 10Gbit prio 1 + + # tc class add dev parent 1: classid 1:2 htb rate 10Gbit prio 7 -- 2.17.1