From: Mario Limonciello <mario.limonciello@amd.com>
To: <linux-kernel@vger.kernel.org>
Cc: Mario Limonciello <mario.limonciello@amd.com>,
Stuart Axon <stuaxo2@yahoo.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, <linux-acpi@vger.kernel.org>
Subject: [PATCH] ACPI: x86: utils: Add Picasso to the list for forcing StorageD3Enable
Date: Fri, 31 Mar 2023 11:08:42 -0500 [thread overview]
Message-ID: <20230331160842.7817-1-mario.limonciello@amd.com> (raw)
Picasso was the first APU that introduced s2idle support from AMD,
and it was predating before vendors started to use `StorageD3Enable`
in their firmware.
Windows doesn't have problems with this hardware and NVME so it was
likely on the list of hardcoded CPUs to use this behavior in Windows.
Add it to the list for Linux to avoid NVME resume issues.
Reported-by: Stuart Axon <stuaxo2@yahoo.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/acpi/x86/utils.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
index da5727069d85..ba420a28a4aa 100644
--- a/drivers/acpi/x86/utils.c
+++ b/drivers/acpi/x86/utils.c
@@ -213,6 +213,7 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
disk in the system.
*/
static const struct x86_cpu_id storage_d3_cpu_ids[] = {
+ X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */
--
2.34.1
next reply other threads:[~2023-03-31 16:09 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-31 16:08 Mario Limonciello [this message]
2023-04-06 18:44 ` Rafael J. Wysocki
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