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[104.53.165.62]) by smtp.gmail.com with ESMTPSA id g11-20020a4a894b000000b0053bb2ae3a78sm1299277ooi.24.2023.03.31.14.58.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 14:58:11 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, bmasney@redhat.com, echanude@redhat.com, ncai@quicinc.com, jsuraj@qti.qualcomm.com, hisunil@quicinc.com, Andrew Halaney Subject: [PATCH v3 0/3] Add EMAC3 support for sa8540p-ride (devicetree/clk bits) Date: Fri, 31 Mar 2023 16:58:01 -0500 Message-Id: <20230331215804.783439-1-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-type: text/plain Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a forward port / upstream refactor of code delivered downstream by Qualcomm over at [0] to enable the DWMAC5 based implementation called EMAC3 on the sa8540p-ride dev board. >From what I can tell with the board schematic in hand, as well as the code delivered, the main changes needed are: 1. A new address space layout for /dwmac5/EMAC3 MTL/DMA regs 2. A new programming sequence required for the EMAC3 base platforms This series addresses the devicetree and clock changes to support this hardware bringup. As requested[1], it has been split up by compile time / maintainer tree. The associated v3 of the netdev specific changes can be found at [2]. Together, they result in the ethernet controller working for both controllers on this platform. [0] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/commit/510235ad02d7f0df478146fb00d7a4ba74821b17 [1] https://lore.kernel.org/netdev/20230320202802.4e7dc54c@kernel.org/ [2] https://lore.kernel.org/netdev/20230331214549.756660-1-ahalaney@redhat.com/T/#m0afcad0e8031c02bcb5dbfb86cb8acfc287968fe v2: https://lore.kernel.org/netdev/20230320221617.236323-1-ahalaney@redhat.com/ v1: https://lore.kernel.org/netdev/20230313165620.128463-1-ahalaney@redhat.com/ Thanks, Andrew Andrew Halaney (3): clk: qcom: gcc-sc8280xp: Add EMAC GDSCs arm64: dts: qcom: sc8280xp: Add ethernet nodes arm64: dts: qcom: sa8540p-ride: Add ethernet nodes arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 181 ++++++++++++++++++ arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 59 ++++++ drivers/clk/qcom/gcc-sc8280xp.c | 18 ++ include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 2 + 4 files changed, 260 insertions(+) -- 2.39.2