From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Bjorn Andersson <andersson@kernel.org>,
Joseph Chen <chenjh@rock-chips.com>,
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
kernel@collabora.com
Subject: [PATCH v2 5/8] regulator: fan53555: Make use of the bit macros
Date: Thu, 6 Apr 2023 20:18:03 +0300 [thread overview]
Message-ID: <20230406171806.948290-6-cristian.ciocaltea@collabora.com> (raw)
In-Reply-To: <20230406171806.948290-1-cristian.ciocaltea@collabora.com>
For consistency and improved clarity, use BIT() and GENMASK() macros for
defining the bitfields inside the registers. No functional changes
intended.
While here, also fix DIE_{ID,REV} inconsistent indentation.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/regulator/fan53555.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c
index 68ebcd4ccef7..181e5eb00e7a 100644
--- a/drivers/regulator/fan53555.c
+++ b/drivers/regulator/fan53555.c
@@ -41,23 +41,23 @@
#define FAN53555_MONITOR 0x05
/* VSEL bit definitions */
-#define VSEL_BUCK_EN (1 << 7)
-#define VSEL_MODE (1 << 6)
+#define VSEL_BUCK_EN BIT(7)
+#define VSEL_MODE BIT(6)
/* Chip ID and Verison */
-#define DIE_ID 0x0F /* ID1 */
-#define DIE_REV 0x0F /* ID2 */
+#define DIE_ID 0x0F /* ID1 */
+#define DIE_REV 0x0F /* ID2 */
/* Control bit definitions */
-#define CTL_OUTPUT_DISCHG (1 << 7)
-#define CTL_SLEW_MASK (0x7 << 4)
-#define CTL_RESET (1 << 2)
+#define CTL_OUTPUT_DISCHG BIT(7)
+#define CTL_SLEW_MASK GENMASK(6, 4)
+#define CTL_RESET BIT(2)
#define CTL_MODE_VSEL0_MODE BIT(0)
#define CTL_MODE_VSEL1_MODE BIT(1)
#define FAN53555_NVOLTAGES 64 /* Numbers of voltages */
#define FAN53526_NVOLTAGES 128
-#define TCS_VSEL0_MODE (1 << 7)
-#define TCS_VSEL1_MODE (1 << 6)
+#define TCS_VSEL0_MODE BIT(7)
+#define TCS_VSEL1_MODE BIT(6)
#define TCS_SLEW_MASK GENMASK(4, 3)
--
2.40.0
next prev parent reply other threads:[~2023-04-06 17:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-06 17:17 [PATCH v2 0/8] Add support for Rockchip RK860X regulators Cristian Ciocaltea
2023-04-06 17:17 ` [PATCH v2 1/8] regulator: dt-bindings: fcs,fan53555: Add support for RK860X Cristian Ciocaltea
2023-04-06 18:14 ` Krzysztof Kozlowski
2023-04-06 19:17 ` Cristian Ciocaltea
2023-04-06 17:18 ` [PATCH v2 2/8] regulator: fan53555: Explicitly include bits header Cristian Ciocaltea
2023-04-06 17:18 ` [PATCH v2 3/8] regulator: fan53555: Fix wrong TCS_SLEW_MASK Cristian Ciocaltea
2023-04-06 17:18 ` [PATCH v2 4/8] regulator: fan53555: Remove unused *_SLEW_SHIFT definitions Cristian Ciocaltea
2023-04-06 17:18 ` Cristian Ciocaltea [this message]
2023-04-06 17:18 ` [PATCH v2 6/8] regulator: fan53555: Improve vsel_mask computation Cristian Ciocaltea
2023-04-06 17:18 ` [PATCH v2 7/8] regulator: fan53555: Use dev_err_probe Cristian Ciocaltea
2023-04-06 17:18 ` [PATCH v2 8/8] regulator: fan53555: Add support for RK860X Cristian Ciocaltea
2023-04-06 18:15 ` Krzysztof Kozlowski
2023-04-06 21:31 ` (subset) [PATCH v2 0/8] Add support for Rockchip RK860X regulators Mark Brown
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