From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: Walker Chen <walker.chen@starfivetech.com>,
Changhuang Liang <changhuang.liang@starfivetech.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: [PATCH v1 4/7] soc: starfive: Add pmu type operation
Date: Mon, 10 Apr 2023 23:47:40 -0700 [thread overview]
Message-ID: <20230411064743.273388-5-changhuang.liang@starfivetech.com> (raw)
In-Reply-To: <20230411064743.273388-1-changhuang.liang@starfivetech.com>
Add pmu type, make a distinction between different PMU.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
drivers/soc/starfive/jh71xx_pmu.c | 55 ++++++++++++++++++++++---------
1 file changed, 39 insertions(+), 16 deletions(-)
diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71xx_pmu.c
index 306218c83691..98f6849d61de 100644
--- a/drivers/soc/starfive/jh71xx_pmu.c
+++ b/drivers/soc/starfive/jh71xx_pmu.c
@@ -45,6 +45,12 @@
*/
#define JH71XX_PMU_TIMEOUT_US 100
+/* pmu type */
+enum pmu_type {
+ JH71XX_PMU_GENERAL,
+ JH71XX_PMU_DPHY,
+};
+
struct jh71xx_domain_info {
const char * const name;
unsigned int flags;
@@ -54,6 +60,7 @@ struct jh71xx_domain_info {
struct jh71xx_pmu_match_data {
const struct jh71xx_domain_info *domain_info;
int num_domains;
+ u8 pmu_type;
};
struct jh71xx_pmu {
@@ -75,19 +82,23 @@ struct jh71xx_pmu_dev {
static int jh71xx_pmu_get_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool *is_on)
{
struct jh71xx_pmu *pmu = pmd->pmu;
+ unsigned int offset = 0;
unsigned int val;
if (!mask)
return -EINVAL;
- regmap_read(pmu->base, JH71XX_PMU_CURR_POWER_MODE, &val);
+ if (pmu->match_data->pmu_type == JH71XX_PMU_GENERAL)
+ offset = JH71XX_PMU_CURR_POWER_MODE;
+
+ regmap_read(pmu->base, offset, &val);
*is_on = val & mask;
return 0;
}
-static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+static int jh71xx_pmu_general_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
{
struct jh71xx_pmu *pmu = pmd->pmu;
unsigned long flags;
@@ -95,22 +106,8 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
u32 mode;
u32 encourage_lo;
u32 encourage_hi;
- bool is_on;
int ret;
- ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
- if (ret) {
- dev_dbg(pmu->dev, "unable to get current state for %s\n",
- pmd->genpd.name);
- return ret;
- }
-
- if (is_on == on) {
- dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
- pmd->genpd.name, on ? "en" : "dis");
- return 0;
- }
-
spin_lock_irqsave(&pmu->lock, flags);
/*
@@ -169,6 +166,31 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
return 0;
}
+static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+{
+ struct jh71xx_pmu *pmu = pmd->pmu;
+ bool is_on;
+ int ret = 0;
+
+ ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
+ if (ret) {
+ dev_dbg(pmu->dev, "unable to get current state for %s\n",
+ pmd->genpd.name);
+ return ret;
+ }
+
+ if (is_on == on) {
+ dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
+ pmd->genpd.name, on ? "en" : "dis");
+ return 0;
+ }
+
+ if (pmu->match_data->pmu_type == JH71XX_PMU_GENERAL)
+ ret = jh71xx_pmu_general_set_state(pmd, mask, on);
+
+ return ret;
+}
+
static int jh71xx_pmu_on(struct generic_pm_domain *genpd)
{
struct jh71xx_pmu_dev *pmd = container_of(genpd,
@@ -360,6 +382,7 @@ static const struct jh71xx_domain_info jh7110_power_domains[] = {
static const struct jh71xx_pmu_match_data jh7110_pmu = {
.num_domains = ARRAY_SIZE(jh7110_power_domains),
.domain_info = jh7110_power_domains,
+ .pmu_type = JH71XX_PMU_GENERAL,
};
static const struct of_device_id jh71xx_pmu_of_match[] = {
--
2.25.1
next prev parent reply other threads:[~2023-04-11 6:48 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-11 6:47 [PATCH v1 0/7] Add JH7110 DPHY PMU support Changhuang Liang
2023-04-11 6:47 ` [PATCH v1 1/7] dt-bindings: power: Constrain properties for JH7110 PMU Changhuang Liang
2023-04-11 20:13 ` Conor Dooley
2023-04-12 2:51 ` Changhuang Liang
2023-04-12 8:35 ` Krzysztof Kozlowski
2023-04-12 8:51 ` Changhuang Liang
2023-04-12 9:42 ` Conor Dooley
2023-04-12 11:29 ` Krzysztof Kozlowski
2023-04-13 2:11 ` Changhuang Liang
2023-04-14 2:20 ` Changhuang Liang
2023-04-17 18:55 ` Conor Dooley
2023-04-18 1:38 ` Changhuang Liang
2023-04-14 6:27 ` Conor Dooley
2023-04-11 6:47 ` [PATCH v1 2/7] soc: starfive: Replace SOC_STARFIVE with ARCH_SATRFIVE Changhuang Liang
2023-04-11 20:13 ` Conor Dooley
2023-04-12 2:11 ` Walker Chen
2023-04-12 2:52 ` Changhuang Liang
2023-04-11 6:47 ` [PATCH v1 3/7] soc: starfive: Modify ioremap to regmap Changhuang Liang
2023-04-11 20:26 ` Conor Dooley
2023-04-12 3:03 ` Changhuang Liang
2023-04-11 6:47 ` Changhuang Liang [this message]
2023-04-11 20:52 ` [PATCH v1 4/7] soc: starfive: Add pmu type operation Conor Dooley
2023-04-12 6:42 ` Changhuang Liang
2023-04-11 6:47 ` [PATCH v1 5/7] soc: starfive: Use call back to parse device tree resources Changhuang Liang
2023-04-11 21:06 ` Conor Dooley
2023-04-12 7:52 ` Changhuang Liang
2023-04-12 6:07 ` Walker Chen
2023-04-12 6:27 ` Conor Dooley
2023-04-11 6:47 ` [PATCH v1 6/7] soc: starfive: Add dphy pmu support Changhuang Liang
2023-04-11 21:15 ` Conor Dooley
2023-04-12 7:31 ` Changhuang Liang
2023-04-12 8:19 ` Changhuang Liang
2023-04-11 6:47 ` [PATCH v1 7/7] riscv: dts: starfive: Add dphy rx pmu node Changhuang Liang
2023-04-11 20:09 ` [PATCH v1 0/7] Add JH7110 DPHY PMU support Conor Dooley
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