From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C522C7618E for ; Sat, 22 Apr 2023 11:38:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229635AbjDVLih (ORCPT ); Sat, 22 Apr 2023 07:38:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229451AbjDVLif (ORCPT ); Sat, 22 Apr 2023 07:38:35 -0400 Received: from desiato.infradead.org (desiato.infradead.org [IPv6:2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA2411FCB for ; Sat, 22 Apr 2023 04:38:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=qoA4LTGgkdfELsJdUxFAcbAY5ZKqxUA7mUBTTATjgqE=; b=AgjaKp4qXfGD0SQZvRj9dUQNd6 SqhDWKuIbF9evSKzi6+NaWLqsh+HdtSKH92wnyxIP9H9ZLQWiWR6voh/hWgVO69wwQfjDo7h6K4dI 9MurVPWrZGxdCJ9PjlmzAUwGD0XNIczRZZlKLmG81XKMR2FMdPPlAhWdGuUdFwXdkRQUgGuL4Jete /1P863hIIZgrKVzxu82pjyoRfHaEVkxbZBNS/qVaQKGAwUGa7VH8xcE26QF1Dbq01NbLgm1+FpbyF JK5Q9k6XmWiEXE/qYC17Lnkq5FQM5YH3iitZiRkUXO+5MMsYu3kvjS9rXySuQmDff+rS625j23dKi okexRrLQ==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.96 #2 (Red Hat Linux)) id 1pqBZG-006EEZ-1z; Sat, 22 Apr 2023 11:38:14 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 31C5E30035C; Sat, 22 Apr 2023 13:38:12 +0200 (CEST) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 0DD8923BDA376; Sat, 22 Apr 2023 13:38:12 +0200 (CEST) Date: Sat, 22 Apr 2023 13:38:11 +0200 From: Peter Zijlstra To: Frederic Weisbecker Cc: Huacai Chen , WANG Xuerui , Thomas Gleixner , "Rafael J. Wysocki" , Anna-Maria Behnsen , LKML Subject: Re: Loongson (and other $ARCHs?) idle VS timer enqueue Message-ID: <20230422113811.GB1215777@hirez.programming.kicks-ass.net> References: <20230421142446.GA1185829@hirez.programming.kicks-ass.net> <20230422080814.GA1214746@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230422080814.GA1214746@hirez.programming.kicks-ass.net> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Apr 22, 2023 at 10:08:14AM +0200, Peter Zijlstra wrote: > On Fri, Apr 21, 2023 at 06:47:29PM +0200, Frederic Weisbecker wrote: > > > > *HOWEVER* > > > > > > intel_idle_irq() is affected -- except that we only (normally) use that > > > for very shallow idle states and it won't interact with NOHZ (because we > > > only disable the tick for deep idle states). > > > > Well I don't know, that doesn't look comfortable... :) > > > > Also why does it need to enable IRQs if ecx=1 ? > > Supposedly this is some interrupt latency hack. See commit: > > c227233ad64c ("intel_idle: enable interrupts before C1 on Xeons") Something like so perhaps... diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h index 778df05f8539..07a4072c43de 100644 --- a/arch/x86/include/asm/mwait.h +++ b/arch/x86/include/asm/mwait.h @@ -115,8 +115,14 @@ static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned lo } __monitor((void *)¤t_thread_info()->flags, 0, 0); - if (!need_resched()) - __mwait(eax, ecx); + if (!need_resched()) { + if (ecx & 1) { + __mwait(eax, ecx); + } else { + __sti_mwait(eax, ecx); + raw_local_irq_disable(); + } + } } current_clr_polling(); } diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 938c17f25d94..4a823bd0f5e0 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -130,11 +130,12 @@ static unsigned int mwait_substates __initdata; #define MWAIT2flg(eax) ((eax & 0xFF) << 24) static __always_inline int __intel_idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, int index) + struct cpuidle_driver *drv, + int index, bool irqoff) { struct cpuidle_state *state = &drv->states[index]; unsigned long eax = flg2MWAIT(state->flags); - unsigned long ecx = 1; /* break on interrupt flag */ + unsigned long ecx = 1*irqoff; /* break on interrupt flag */ mwait_idle_with_hints(eax, ecx); @@ -158,19 +159,13 @@ static __always_inline int __intel_idle(struct cpuidle_device *dev, static __cpuidle int intel_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - return __intel_idle(dev, drv, index); + return __intel_idle(dev, drv, index, true); } static __cpuidle int intel_idle_irq(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - int ret; - - raw_local_irq_enable(); - ret = __intel_idle(dev, drv, index); - raw_local_irq_disable(); - - return ret; + return __intel_idle(dev, drv, index, false); } static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev, @@ -183,7 +178,7 @@ static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev, if (smt_active) native_wrmsrl(MSR_IA32_SPEC_CTRL, 0); - ret = __intel_idle(dev, drv, index); + ret = __intel_idle(dev, drv, index, true); if (smt_active) native_wrmsrl(MSR_IA32_SPEC_CTRL, spec_ctrl); @@ -195,7 +190,7 @@ static __cpuidle int intel_idle_xstate(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { fpu_idle_fpregs(); - return __intel_idle(dev, drv, index); + return __intel_idle(dev, drv, index, true); } /**