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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT099.mail.protection.outlook.com (10.13.177.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6340.21 via Frontend Transport; Tue, 25 Apr 2023 14:22:37 +0000 Received: from BLR-5CG113396H.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 25 Apr 2023 09:22:31 -0500 From: Ravi Bangoria To: CC: , , , , , , , , , , , , , , , , Subject: [PATCH v3 0/3] perf: Rework event forwarding logic Date: Tue, 25 Apr 2023 19:52:02 +0530 Message-ID: <20230425142205.762-1-ravi.bangoria@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT099:EE_|CH0PR12MB5218:EE_ X-MS-Office365-Filtering-Correlation-Id: f4ee4e29-4364-4007-350e-08db45988575 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2023 14:22:37.8985 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f4ee4e29-4364-4007-350e-08db45988575 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT099.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5218 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Usually events are opened on the same pmu as requested by user via perf_event_attr->type argument. But certain special events are internally redirected to different pmu. Currently such pmus needs to be treated specially and thus requires some gruesome hacks. An approach, suggested by Peter Zijlstra, to get rid of these hacks was to overwrite event attributes with new pmu's attribute values within the kernel and let perf_event_init() retry opening the event with overwritten values. This patch series implements it. v2: https://lore.kernel.org/r/20230309101111.444-1-ravi.bangoria@amd.com v2->v3: - Both uses different approach to solve the problem. v2 was using new error value -ESRCH to let perf_event_init() try opening event with all pmus, hoping that the event will get forwarded to right pmu. OTOH, v3 uses different approach as described in the description. - v3 also fixes SW pmu to task-clock/cpu-clock pmu event forwarding. Patches are prepared on v6.3. Ravi Bangoria (3): perf/core: Rework forwarding of {task|cpu}-clock events perf/ibs: Fix interface via core pmu events perf test: Add selftest to test IBS invocation via core pmu events arch/x86/events/amd/core.c | 2 +- arch/x86/events/amd/ibs.c | 53 ++++++++--------- arch/x86/include/asm/perf_event.h | 2 + include/linux/perf_event.h | 11 ++++ kernel/events/core.c | 79 +++++++++++-------------- tools/perf/tests/Build | 1 + tools/perf/tests/amd-ibs-via-core-pmu.c | 72 ++++++++++++++++++++++ tools/perf/tests/builtin-test.c | 1 + tools/perf/tests/tests.h | 1 + 9 files changed, 151 insertions(+), 71 deletions(-) create mode 100644 tools/perf/tests/amd-ibs-via-core-pmu.c -- 2.40.0