From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E6EFC7EE22 for ; Tue, 9 May 2023 12:10:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235701AbjEIMKO (ORCPT ); Tue, 9 May 2023 08:10:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235671AbjEIMKJ (ORCPT ); Tue, 9 May 2023 08:10:09 -0400 Received: from mail.skyhub.de (mail.skyhub.de [5.9.137.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0257930DF for ; Tue, 9 May 2023 05:10:05 -0700 (PDT) Received: from zn.tnic (p5de8e8ea.dip0.t-ipconnect.de [93.232.232.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 7AF891EC051E; Tue, 9 May 2023 14:10:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1683634204; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=wKU+5dLzi/cyyvoZTda4liRyQwOA+JP82DzVCavTcYc=; b=MBUrxK5kSRYcYCoCd7fWpSgPCFQgu7IKO1o1ecpTGtL9Tujw1DqdDebpNFtSOw/6tR/uOt u9CYkGSEF4hBdpKPWh4xO9BvBYZQODFwZ9MXVVezrvr1eK5fHqZNVn7289ckuGCQYoYP/D ixWbEw5/pwcB9yPISKOZNjkA729ptuM= Date: Tue, 9 May 2023 14:10:00 +0200 From: Borislav Petkov To: Juergen Gross Cc: linux-kernel@vger.kernel.org, x86@kernel.org, mikelley@microsoft.com, Thomas Gleixner , Ingo Molnar , Dave Hansen , "H. Peter Anvin" Subject: Re: [PATCH v6 11/16] x86/mtrr: construct a memory map with cache modes Message-ID: <20230509121000.GAZFo4GOV9RnygziXH@fat_crate.local> References: <20230502120931.20719-1-jgross@suse.com> <20230502120931.20719-12-jgross@suse.com> <20230509113640.GDZFowSMVK66B30cAA@fat_crate.local> <1048ca31-bc34-fd29-c0da-6df141ff8b68@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1048ca31-bc34-fd29-c0da-6df141ff8b68@suse.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 09, 2023 at 01:47:47PM +0200, Juergen Gross wrote: > ... this call not being needed at all. We can reach this point only for > mtrr_if != &generic_mtrr_ops. Can't be too cautious with that MTRR maze but yeah, this is the MTRRs disabled path. Ok, so even simpler then. I've renamed it to generic_rebuild_map() to go along with the rest of the generic.c APIs. Thx. --- diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 163dca53796c..3a3b985006e2 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c @@ -458,8 +458,11 @@ static void map_add_var(void) * removals of registers, which are complicated to handle without rebuild of * the map. */ -static void rebuild_map(void) +void generic_rebuild_map(void) { + if (mtrr_if != &generic_mtrr_ops) + return; + cache_map_n = cache_map_fixed; map_add_var(); @@ -1127,10 +1130,6 @@ static void generic_set_mtrr(unsigned int reg, unsigned long base, cache_enable(); local_irq_restore(flags); - - /* On the first CPU rebuild the cache mode memory map. */ - if (smp_processor_id() == cpumask_first(cpu_online_mask)) - rebuild_map(); } int generic_validate_add_page(unsigned long base, unsigned long size, diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c index 5fb61bb97ab1..bcde9a754f62 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.c +++ b/arch/x86/kernel/cpu/mtrr/mtrr.c @@ -187,6 +187,8 @@ static void set_mtrr(unsigned int reg, unsigned long base, unsigned long size, }; stop_machine_cpuslocked(mtrr_rendezvous_handler, &data, cpu_online_mask); + + generic_rebuild_map(); } /** diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h index 48ffd89cf3a6..81babff29c59 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h @@ -79,3 +79,4 @@ extern const struct mtrr_ops centaur_mtrr_ops; extern int changed_by_mtrr_cleanup; extern int mtrr_cleanup(void); +void generic_rebuild_map(void); -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette