From: Jinrong Liang <ljr.kernel@gmail.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>, Like Xu <likexu@tencent.com>,
David Matlack <dmatlack@google.com>,
Aaron Lewis <aaronlewis@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jinrong Liang <cloudliang@tencent.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 7/8] KVM: selftests: Test Intel supported fixed counters bit mask
Date: Tue, 30 May 2023 21:42:47 +0800 [thread overview]
Message-ID: <20230530134248.23998-8-cloudliang@tencent.com> (raw)
In-Reply-To: <20230530134248.23998-1-cloudliang@tencent.com>
From: Like Xu <likexu@tencent.com>
Add a test to check that fixed counters enabled via guest
CPUID.0xA.ECX (instead of EDX[04:00]) work as normal as usual.
Co-developed-by: Jinrong Liang <cloudliang@tencent.com>
Signed-off-by: Jinrong Liang <cloudliang@tencent.com>
Signed-off-by: Like Xu <likexu@tencent.com>
---
.../kvm/x86_64/pmu_basic_functionality_test.c | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/tools/testing/selftests/kvm/x86_64/pmu_basic_functionality_test.c b/tools/testing/selftests/kvm/x86_64/pmu_basic_functionality_test.c
index e19f8c2774c5..108cfe254095 100644
--- a/tools/testing/selftests/kvm/x86_64/pmu_basic_functionality_test.c
+++ b/tools/testing/selftests/kvm/x86_64/pmu_basic_functionality_test.c
@@ -298,10 +298,81 @@ static void intel_test_counters_num(void)
}
}
+static void intel_guest_run_fixed_counters(uint64_t supported_bitmask,
+ uint8_t max_fixed_num)
+{
+ unsigned int i;
+ uint64_t msr_val;
+
+ for (i = 0; i < max_fixed_num; i++) {
+ if (!(supported_bitmask & BIT_ULL(i)))
+ continue;
+
+ if (wrmsr_safe(MSR_CORE_PERF_FIXED_CTR0 + i, 0) == GP_VECTOR)
+ GUEST_SYNC(GP_VECTOR);
+
+ wrmsr_safe(MSR_CORE_PERF_FIXED_CTR_CTRL, BIT_ULL(4 * i));
+ wrmsr_safe(MSR_CORE_PERF_GLOBAL_CTRL, BIT_ULL(INTEL_PMC_IDX_FIXED + i));
+ __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES}));
+ wrmsr_safe(MSR_CORE_PERF_GLOBAL_CTRL, 0);
+ rdmsr_safe(MSR_CORE_PERF_FIXED_CTR0 + i, &msr_val);
+
+ GUEST_SYNC(msr_val);
+ }
+
+ GUEST_DONE();
+}
+
+static void test_fixed_counters_setup(struct kvm_vcpu *vcpu, uint8_t edx_fix_num,
+ uint32_t fixed_bitmask, bool expected)
+{
+ struct kvm_cpuid_entry2 *entry;
+ uint8_t max_fixed_num = X86_INTEL_MAX_FIXED_CTR_NUM;
+ uint64_t supported_bitmask = 0;
+ uint64_t msr_val;
+ unsigned int i;
+
+ entry = vcpu_get_cpuid_entry(vcpu, 0xa);
+ entry->ecx = fixed_bitmask;
+ entry->edx = (entry->edx & ~FIXED_CTR_NUM_MASK) | edx_fix_num;
+ vcpu_set_cpuid(vcpu);
+
+ for (i = 0; i < max_fixed_num; i++) {
+ if (entry->ecx & BIT_ULL(i) ||
+ ((entry->edx & FIXED_CTR_NUM_MASK) > i))
+ supported_bitmask |= BIT_ULL(i);
+ }
+
+ vcpu_args_set(vcpu, 2, supported_bitmask, max_fixed_num);
+
+ while (run_vcpu(vcpu, &msr_val) != UCALL_DONE)
+ TEST_ASSERT(!!msr_val == expected,
+ "Unexpected when testing fixed counter.");
+}
+
+static void intel_test_fixed_counters(void)
+{
+ struct kvm_vm *vm;
+ struct kvm_vcpu *vcpu;
+ uint32_t ecx;
+ uint8_t edx, num = X86_INTEL_MAX_FIXED_CTR_NUM;
+
+ for (edx = 0; edx <= num; edx++) {
+ /* KVM doesn't emulate more fixed counters than it can support. */
+ for (ecx = 0; ecx <= (BIT_ULL(num) - 1); ecx++) {
+ vm = pmu_vm_create_with_one_vcpu(&vcpu,
+ intel_guest_run_fixed_counters);
+ test_fixed_counters_setup(vcpu, edx, ecx, true);
+ kvm_vm_free(vm);
+ }
+ }
+}
+
static void intel_test_pmu_cpuid(void)
{
intel_test_arch_events();
intel_test_counters_num();
+ intel_test_fixed_counters();
}
int main(int argc, char *argv[])
--
2.31.1
next prev parent reply other threads:[~2023-05-30 13:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-30 13:42 [PATCH v2 0/8] KVM: selftests: Test the consistency of the PMU's CPUID and its features Jinrong Liang
2023-05-30 13:42 ` [PATCH v2 1/8] KVM: selftests: KVM: selftests: Add macros for fixed counters in processor.h Jinrong Liang
2023-06-28 19:46 ` Sean Christopherson
2023-05-30 13:42 ` [PATCH v2 2/8] KVM: selftests: Add pmu.h for PMU events and common masks Jinrong Liang
2023-06-28 20:02 ` Sean Christopherson
2023-05-30 13:42 ` [PATCH v2 3/8] KVM: selftests: Test Intel PMU architectural events on gp counters Jinrong Liang
2023-06-28 20:43 ` Sean Christopherson
2023-06-28 21:03 ` Jim Mattson
2023-05-30 13:42 ` [PATCH v2 4/8] KVM: selftests: Test Intel PMU architectural events on fixed counters Jinrong Liang
2023-05-30 13:42 ` [PATCH v2 5/8] KVM: selftests: Test consistency of CPUID with num of gp counters Jinrong Liang
2023-05-30 13:42 ` [PATCH v2 6/8] KVM: selftests: Test consistency of CPUID with num of fixed counters Jinrong Liang
2023-06-28 21:01 ` Sean Christopherson
2023-05-30 13:42 ` Jinrong Liang [this message]
2023-06-28 21:05 ` [PATCH v2 7/8] KVM: selftests: Test Intel supported fixed counters bit mask Sean Christopherson
2023-05-30 13:42 ` [PATCH v2 8/8] KVM: selftests: Test consistency of PMU MSRs with Intel PMU version Jinrong Liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230530134248.23998-8-cloudliang@tencent.com \
--to=ljr.kernel@gmail.com \
--cc=aaronlewis@google.com \
--cc=cloudliang@tencent.com \
--cc=dmatlack@google.com \
--cc=kvm@vger.kernel.org \
--cc=likexu@tencent.com \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome