From: Florian Fainelli <florian.fainelli@broadcom.com>
To: netdev@vger.kernel.org
Cc: Florian Fainelli <florian.fainelli@broadcom.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH net-next] net: phy: broadcom: Add LPI counter
Date: Wed, 31 May 2023 16:17:29 -0700 [thread overview]
Message-ID: <20230531231729.1873932-1-florian.fainelli@broadcom.com> (raw)
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Add the ability to read the PHY maintained LPI counter which is in the
Clause 45 vendor space, device address 7, offset 0x803F. The counter is
cleared on read.
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
drivers/net/phy/bcm-phy-lib.c | 19 ++++++++++++-------
include/linux/brcmphy.h | 2 ++
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
index 5603d0a9ce96..c6e2e5f636d4 100644
--- a/drivers/net/phy/bcm-phy-lib.c
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -496,18 +496,20 @@ EXPORT_SYMBOL_GPL(bcm_phy_downshift_set);
struct bcm_phy_hw_stat {
const char *string;
- u8 reg;
+ int devad;
+ u16 reg;
u8 shift;
u8 bits;
};
/* Counters freeze at either 0xffff or 0xff, better than nothing */
static const struct bcm_phy_hw_stat bcm_phy_hw_stats[] = {
- { "phy_receive_errors", MII_BRCM_CORE_BASE12, 0, 16 },
- { "phy_serdes_ber_errors", MII_BRCM_CORE_BASE13, 8, 8 },
- { "phy_false_carrier_sense_errors", MII_BRCM_CORE_BASE13, 0, 8 },
- { "phy_local_rcvr_nok", MII_BRCM_CORE_BASE14, 8, 8 },
- { "phy_remote_rcv_nok", MII_BRCM_CORE_BASE14, 0, 8 },
+ { "phy_receive_errors", -1, MII_BRCM_CORE_BASE12, 0, 16 },
+ { "phy_serdes_ber_errors", -1, MII_BRCM_CORE_BASE13, 8, 8 },
+ { "phy_false_carrier_sense_errors", -1, MII_BRCM_CORE_BASE13, 0, 8 },
+ { "phy_local_rcvr_nok", -1, MII_BRCM_CORE_BASE14, 8, 8 },
+ { "phy_remote_rcv_nok", -1, MII_BRCM_CORE_BASE14, 0, 8 },
+ { "phy_lpi_count", MDIO_MMD_AN, BRCM_CL45VEN_EEE_LPI_CNT, 0, 16 },
};
int bcm_phy_get_sset_count(struct phy_device *phydev)
@@ -536,7 +538,10 @@ static u64 bcm_phy_get_stat(struct phy_device *phydev, u64 *shadow,
int val;
u64 ret;
- val = phy_read(phydev, stat.reg);
+ if (stat.devad < 0)
+ val = phy_read(phydev, stat.reg);
+ else
+ val = phy_read_mmd(phydev, stat.devad, stat.reg);
if (val < 0) {
ret = U64_MAX;
} else {
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index e9afbfb6d7a5..251833ab271f 100644
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -359,6 +359,8 @@
#define LPI_FEATURE_EN 0x8000
#define LPI_FEATURE_EN_DIG1000X 0x4000
+#define BRCM_CL45VEN_EEE_LPI_CNT 0x803f
+
/* Core register definitions*/
#define MII_BRCM_CORE_BASE12 0x12
#define MII_BRCM_CORE_BASE13 0x13
--
2.34.1
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next reply other threads:[~2023-05-31 23:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-31 23:17 Florian Fainelli [this message]
2023-06-01 14:19 ` Andrew Lunn
2023-06-02 5:00 ` patchwork-bot+netdevbpf
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