From: Su Hui <suhui@nfschina.com>
To: Douglas Anderson <dianders@chromium.org>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>
Cc: u.kleine-koenig@pengutronix.de, andersson@kernel.org,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Su Hui <suhui@nfschina.com>
Subject: [PATCH] drm/bridge: ti-sn65dsi86: Avoid possible buffer overflow
Date: Tue, 6 Jun 2023 15:55:27 +0800 [thread overview]
Message-ID: <20230606075527.155346-1-suhui@nfschina.com> (raw)
Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5.
Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip")
Signed-off-by: Su Hui <suhui@nfschina.com>
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index 7a748785c545..952aae4221e7 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -305,7 +305,8 @@ static void ti_sn_bridge_set_refclk_freq(struct ti_sn65dsi86 *pdata)
* The PWM refclk is based on the value written to SN_DPPLL_SRC_REG,
* regardless of its actual sourcing.
*/
- pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i];
+ if (i < refclk_lut_size)
+ pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i];
}
static void ti_sn65dsi86_enable_comms(struct ti_sn65dsi86 *pdata)
--
2.30.2
next reply other threads:[~2023-06-06 8:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 7:55 Su Hui [this message]
2023-06-06 15:28 ` Doug Anderson
2023-06-07 0:50 ` Longsuhui
2023-06-07 1:17 ` Su Hui
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