From: Yunhong Jiang <yunhong.jiang@linux.intel.com>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org,
Evgeniy Baskov <baskov@ispras.ru>, Borislav Petkov <bp@alien8.de>,
Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
Alexey Khoroshilov <khoroshilov@ispras.ru>,
Peter Jones <pjones@redhat.com>,
Gerd Hoffmann <kraxel@redhat.com>, Dave Young <dyoung@redhat.com>,
Mario Limonciello <mario.limonciello@amd.com>,
Kees Cook <keescook@chromium.org>,
Tom Lendacky <thomas.lendacky@amd.com>,
"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Joerg Roedel <jroedel@suse.de>
Subject: Re: [PATCH v5 08/20] x86/decompressor: Use standard calling convention for trampoline
Date: Wed, 7 Jun 2023 12:38:34 -0700 [thread overview]
Message-ID: <20230607193834.GC3110@yjiang5-mobl.amr.corp.intel.com> (raw)
In-Reply-To: <20230607072342.4054036-9-ardb@kernel.org>
On Wed, Jun 07, 2023 at 09:23:30AM +0200, Ard Biesheuvel wrote:
> Update the trampoline code so its arguments are passed via RDI and RSI,
> which matches the ordinary SysV calling convention for x86_64. This will
> allow this code to be called directly from C.
>
> Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> ---
> arch/x86/boot/compressed/head_64.S | 30 +++++++++-----------
> arch/x86/boot/compressed/pgtable.h | 2 +-
> 2 files changed, 14 insertions(+), 18 deletions(-)
>
> diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
> index af45ddd8297a4a07..a387cd80964e1a1e 100644
> --- a/arch/x86/boot/compressed/head_64.S
> +++ b/arch/x86/boot/compressed/head_64.S
> @@ -443,9 +443,9 @@ SYM_CODE_START(startup_64)
> movq %r15, %rdi /* pass struct boot_params pointer */
> call paging_prepare
>
> - /* Save the trampoline address in RCX */
> - movq %rax, %rcx
> -
> + /* Pass the trampoline address and boolean flag as args #1 and #2 */
> + movq %rax, %rdi
> + movq %rdx, %rsi
> leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax
> call *%rax
>
> @@ -534,11 +534,11 @@ SYM_FUNC_END(.Lrelocated)
> /*
> * This is the 32-bit trampoline that will be copied over to low memory.
> *
> - * ECX contains the base address of the trampoline memory.
> - * Non zero RDX means trampoline needs to enable 5-level paging.
> + * EDI contains the base address of the trampoline memory.
> + * Non-zero ESI means trampoline needs to enable 5-level paging.
> */
> SYM_CODE_START(trampoline_32bit_src)
After the whole patchset, this function now only switch the paging level, is my
understanding correct? After all, it's converted to toggle_la57 directly in the
followed patches. If that's the case, would it makes sense to rename it
correspondingly?
Also, to align with the toggle_la57, would we make the first parameter as just
page table, instead of trampoline memory address?
> - popq %rdi
> + popq %r8
> /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
> pushq $__KERNEL32_CS
> leaq 0f(%rip), %rax
> @@ -552,7 +552,7 @@ SYM_CODE_START(trampoline_32bit_src)
> movl %eax, %ss
>
> /* Set up new stack */
> - leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp
> + leal TRAMPOLINE_32BIT_STACK_END(%edi), %esp
>
> /* Disable paging */
> movl %cr0, %eax
> @@ -560,7 +560,7 @@ SYM_CODE_START(trampoline_32bit_src)
> movl %eax, %cr0
>
> /* Check what paging mode we want to be in after the trampoline */
> - testl %edx, %edx
> + testl %esi, %esi
> jz 1f
>
> /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */
> @@ -575,21 +575,17 @@ SYM_CODE_START(trampoline_32bit_src)
> jz 3f
> 2:
> /* Point CR3 to the trampoline's new top level page table */
> - leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
> + leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%edi), %eax
> movl %eax, %cr3
> 3:
> /* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */
> - pushl %ecx
> - pushl %edx
> movl $MSR_EFER, %ecx
> rdmsr
> btsl $_EFER_LME, %eax
> /* Avoid writing EFER if no change was made (for TDX guest) */
> jc 1f
> wrmsr
> -1: popl %edx
> - popl %ecx
> -
> +1:
> #ifdef CONFIG_X86_MCE
> /*
> * Preserve CR4.MCE if the kernel will enable #MC support.
> @@ -606,14 +602,14 @@ SYM_CODE_START(trampoline_32bit_src)
>
> /* Enable PAE and LA57 (if required) paging modes */
> orl $X86_CR4_PAE, %eax
> - testl %edx, %edx
> + testl %esi, %esi
> jz 1f
> orl $X86_CR4_LA57, %eax
> 1:
> movl %eax, %cr4
>
> /* Calculate address of paging_enabled() once we are executing in the trampoline */
> - leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
> + leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%edi), %eax
>
> /* Prepare the stack for far return to Long Mode */
> pushl $__KERNEL_CS
> @@ -630,7 +626,7 @@ SYM_CODE_END(trampoline_32bit_src)
> .code64
> SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled)
> /* Return from the trampoline */
> - jmp *%rdi
> + jmp *%r8
> SYM_FUNC_END(.Lpaging_enabled)
>
> /*
> diff --git a/arch/x86/boot/compressed/pgtable.h b/arch/x86/boot/compressed/pgtable.h
> index 91dbb99203fbce2d..4e8cef135226bcbb 100644
> --- a/arch/x86/boot/compressed/pgtable.h
> +++ b/arch/x86/boot/compressed/pgtable.h
> @@ -14,7 +14,7 @@
>
> extern unsigned long *trampoline_32bit;
>
> -extern void trampoline_32bit_src(void *return_ptr);
> +extern void trampoline_32bit_src(void *trampoline, bool enable_5lvl);
>
> #endif /* __ASSEMBLER__ */
> #endif /* BOOT_COMPRESSED_PAGETABLE_H */
> --
> 2.39.2
>
next prev parent reply other threads:[~2023-06-07 19:38 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-07 7:23 [PATCH v5 00/20] efi/x86: Avoid bare metal decompressor during EFI boot Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 01/20] x86/efistub: Branch straight to kernel entry point from C code Ard Biesheuvel
2023-06-07 18:53 ` Borislav Petkov
2023-06-07 19:39 ` Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 02/20] x86/efistub: Simplify and clean up handover entry code Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 03/20] x86/decompressor: Avoid magic offsets for EFI handover entrypoint Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 04/20] x86/efistub: Clear BSS in EFI handover protocol entrypoint Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 05/20] x86/decompressor: Use proper sequence to take the address of the GOT Ard Biesheuvel
2023-06-21 11:08 ` Borislav Petkov
2023-06-23 14:00 ` Ard Biesheuvel
2023-07-07 13:56 ` Borislav Petkov
2023-06-07 7:23 ` [PATCH v5 06/20] x86/decompressor: Store boot_params pointer in callee save register Ard Biesheuvel
2023-07-10 9:06 ` Borislav Petkov
2023-07-10 21:55 ` Ard Biesheuvel
2023-07-11 7:57 ` Borislav Petkov
2023-06-07 7:23 ` [PATCH v5 07/20] x86/decompressor: Call trampoline as a normal function Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 08/20] x86/decompressor: Use standard calling convention for trampoline Ard Biesheuvel
2023-06-07 19:38 ` Yunhong Jiang [this message]
2023-06-07 20:07 ` Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 09/20] x86/decompressor: Avoid the need for a stack in the 32-bit trampoline Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 10/20] x86/decompressor: Call trampoline directly from C code Ard Biesheuvel
2023-06-07 18:09 ` Yunhong Jiang
2023-06-08 8:04 ` Ard Biesheuvel
2023-06-08 18:15 ` Yunhong Jiang
2023-06-07 7:23 ` [PATCH v5 11/20] x86/decompressor: Only call the trampoline when changing paging levels Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 12/20] x86/decompressor: Merge trampoline cleanup with switching code Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 13/20] x86/efistub: Perform 4/5 level paging switch from the stub Ard Biesheuvel
2023-06-07 20:19 ` Yunhong Jiang
2023-06-07 20:31 ` Ard Biesheuvel
2023-06-08 0:43 ` Yunhong Jiang
2023-06-08 6:34 ` Ard Biesheuvel
2023-06-08 16:10 ` Yunhong Jiang
2023-06-07 7:23 ` [PATCH v5 14/20] x86/efistub: Prefer EFI memory attributes protocol over DXE services Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 15/20] decompress: Use 8 byte alignment Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 16/20] x86/decompressor: Move global symbol references to C code Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 17/20] x86/decompressor: Factor out kernel decompression and relocation Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 18/20] efi/libstub: Add limit argument to efi_random_alloc() Ard Biesheuvel
2023-06-07 7:23 ` [PATCH v5 19/20] x86/efistub: Perform SNP feature test while running in the firmware Ard Biesheuvel
2023-06-07 16:07 ` Tom Lendacky
2023-06-07 16:51 ` Ard Biesheuvel
2023-06-07 17:29 ` Tom Lendacky
2023-06-07 7:23 ` [PATCH v5 20/20] x86/efistub: Avoid legacy decompressor when doing EFI boot Ard Biesheuvel
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