From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Dave Martin <Dave.Martin@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH] arm64/fpsimd: Only provide the length to cpufeature for xCR registers
Date: Thu, 27 Jul 2023 22:31:44 +0100 [thread overview]
Message-ID: <20230727-arm64-sme-fa64-hotplug-v1-1-34ae93afc05b@kernel.org> (raw)
For both SVE and SME we abuse the generic register field comparison
support in the cpufeature code as part of our detection of unsupported
variations in the vector lengths available to PEs, reporting the maximum
vector lengths via ZCR_EL1.LEN and SMCR_EL1.LEN. Since these are
configuration registers rather than identification registers the
assumptions the cpufeature code makes about how unknown bitfields behave
are invalid, leading to warnings when SME features like FA64 are enabled
and we hotplug a CPU:
CPU features: SANITY CHECK: Unexpected variation in SYS_SMCR_EL1. Boot CPU: 0x0000000000000f, CPU3: 0x0000008000000f
CPU features: Unsupported CPU feature variation detected.
SVE has no controls other than the vector length so is not yet impacted
but the same issue will apply there if any are defined.
Since the only field we are interested in having the cpufeature code
handle is the length field and we use a custom read function to obtain
the value we can avoid these warnings by filtering out all other bits
when we return the register value.
Fixes: 2e0f2478ea37eb ("arm64/sve: Probe SVE capabilities and usable vector lengths")
FixeS: b42990d3bf77cc ("arm64/sme: Identify supported SME vector lengths at boot")
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/kernel/fpsimd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 89d54a5242d1..c7fdeebd050c 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -1189,11 +1189,11 @@ u64 read_zcr_features(void)
write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1);
zcr = read_sysreg_s(SYS_ZCR_EL1);
- zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */
+ zcr &= ~(u64)ZCR_ELx_LEN_MASK;
vq_max = sve_vq_from_vl(sve_get_vl());
zcr |= vq_max - 1; /* set LEN field to maximum effective value */
- return zcr;
+ return SYS_FIELD_GET(ZCR_ELx, LEN, zcr);
}
void __init sve_setup(void)
@@ -1364,7 +1364,7 @@ u64 read_smcr_features(void)
vq_max = sve_vq_from_vl(sme_get_vl());
smcr |= vq_max - 1; /* set LEN field to maximum effective value */
- return smcr;
+ return SYS_FIELD_GET(SMCR_ELx, LEN, smcr);
}
void __init sme_setup(void)
---
base-commit: 6eaae198076080886b9e7d57f4ae06fa782f90ef
change-id: 20230727-arm64-sme-fa64-hotplug-1e6896746f97
Best regards,
--
Mark Brown <broonie@kernel.org>
next reply other threads:[~2023-07-27 21:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-27 21:31 Mark Brown [this message]
2023-07-28 10:27 ` Jonathan Cameron
2023-07-28 11:54 ` Mark Brown
2023-08-02 11:21 ` Will Deacon
2023-08-02 12:21 ` Mark Brown
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