From: Michael Walle <mwalle@kernel.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>,
Pratyush Yadav <pratyush@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
Michael Walle <mwalle@kernel.org>
Subject: [PATCH v3 28/41] mtd: spi-nor: winbond: convert flash_info to new format
Date: Fri, 08 Sep 2023 12:16:46 +0200 [thread overview]
Message-ID: <20230807-mtd-flash-info-db-rework-v3-28-e60548861b10@kernel.org> (raw)
In-Reply-To: <20230807-mtd-flash-info-db-rework-v3-0-e60548861b10@kernel.org>
The INFOx() macros are going away. Convert the flash_info database to
the new format.
Signed-off-by: Michael Walle <mwalle@kernel.org>
---
drivers/mtd/spi-nor/winbond.c | 281 +++++++++++++++++++++++++++---------------
1 file changed, 185 insertions(+), 96 deletions(-)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 0ca3e612ccf5..edc64c99cd81 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -42,102 +42,191 @@ static const struct spi_nor_fixups w25q256_fixups = {
};
static const struct flash_info winbond_nor_parts[] = {
- { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q16dw", INFO(0xef6015, 0, 64 * 1024, 32)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q16jv-im/jm", INFO(0xef7015, 0, 64 * 1024, 32)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q20cl", INFO(0xef4012, 0, 64 * 1024, 4)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q20bw", INFO(0xef5012, 0, 64 * 1024, 4)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q20ew", INFO(0xef6012, 0, 64 * 1024, 4)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- OTP_INFO(256, 3, 0x1000, 0x1000) },
- { "w25q32jv", INFO(0xef7016, 0, 64 * 1024, 64)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q32jwm", INFO(0xef8016, 0, 64 * 1024, 64)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- OTP_INFO(256, 3, 0x1000, 0x1000) },
- { "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q128jwm", INFO(0xef8018, 0, 64 * 1024, 256)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q256jwm", INFO(0xef8019, 0, 64 * 1024, 512)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q64jvm", INFO(0xef7017, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q128jv", INFO(0xef7018, 0, 64 * 1024, 256)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16)
- NO_SFDP_FLAGS(SECT_4K) },
- { "w25q128", INFO(0xef4018, 0, 0, 0)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
- { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
- .fixups = &w25q256_fixups },
- { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 0) },
- { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
- { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ |
- SPI_NOR_DUAL_READ) },
- { "w25q512nwq", INFO(0xef6020, 0, 0, 0)
- OTP_INFO(256, 3, 0x1000, 0x1000) },
- { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0)
- OTP_INFO(256, 3, 0x1000, 0x1000) },
- { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
- SPI_NOR_QUAD_READ) },
+ {
+ .id = SNOR_ID(0xef, 0x30, 0x10),
+ .name = "w25x05",
+ .size = SZ_64K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x11),
+ .name = "w25x10",
+ .size = SZ_128K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x12),
+ .name = "w25x20",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x13),
+ .name = "w25x40",
+ .size = SZ_512K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x14),
+ .name = "w25x80",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x15),
+ .name = "w25x16",
+ .size = SZ_2M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x15),
+ .name = "w25q16dw",
+ .size = SZ_2M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x16),
+ .name = "w25x32",
+ .size = SZ_4M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x70, 0x15),
+ .name = "w25q16jv-im/jm",
+ .size = SZ_2M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x12),
+ .name = "w25q20cl",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x50, 0x12),
+ .name = "w25q20bw",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x12),
+ .name = "w25q20ew",
+ .size = SZ_256K,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x16),
+ .name = "w25q32",
+ .size = SZ_4M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x16),
+ .name = "w25q32dw",
+ .size = SZ_4M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ .id = SNOR_ID(0xef, 0x70, 0x16),
+ .name = "w25q32jv",
+ .size = SZ_4M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x16),
+ .name = "w25q32jwm",
+ .size = SZ_4M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x17),
+ .name = "w25q64jwm",
+ .size = SZ_8M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x18),
+ .name = "w25q128jwm",
+ .size = SZ_16M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x19),
+ .name = "w25q256jwm",
+ .size = SZ_32M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x30, 0x17),
+ .name = "w25x64",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x17),
+ .name = "w25q64",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x17),
+ .name = "w25q64dw",
+ .size = SZ_8M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x70, 0x17),
+ .name = "w25q64jvm",
+ .size = SZ_8M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x18),
+ .name = "w25q128fw",
+ .size = SZ_16M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x70, 0x18),
+ .name = "w25q128jv",
+ .size = SZ_16M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x50, 0x14),
+ .name = "w25q80",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x14),
+ .name = "w25q80bl",
+ .size = SZ_1M,
+ .no_sfdp_flags = SECT_4K,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x18),
+ .name = "w25q128",
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x19),
+ .name = "w25q256",
+ .size = SZ_32M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ .fixups = &w25q256_fixups,
+ }, {
+ .id = SNOR_ID(0xef, 0x70, 0x19),
+ .name = "w25q256jvm",
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x19),
+ .name = "w25q256jw",
+ .size = SZ_32M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x71, 0x19),
+ .name = "w25m512jv",
+ .size = SZ_64M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xef, 0x60, 0x20),
+ .name = "w25q512nwq",
+ .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ .id = SNOR_ID(0xef, 0x80, 0x20),
+ .name = "w25q512nwm",
+ .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ .id = SNOR_ID(0xef, 0x40, 0x20),
+ .name = "w25q512jvq",
+ .size = SZ_64M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ },
};
/**
--
2.39.2
next prev parent reply other threads:[~2023-09-08 10:29 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-08 10:16 [PATCH v3 00/41] mtd: spi-nor: clean the flash_info database up Michael Walle
2023-09-08 10:16 ` [PATCH v3 01/41] mtd: spi-nor: remove catalyst 'flashes' Michael Walle
2023-09-08 10:16 ` [PATCH v3 02/41] mtd: spi-nor: remove Fujitsu MB85RS1MT support Michael Walle
2023-09-08 10:16 ` [PATCH v3 03/41] mtd: spi-nor: xilinx: use SPI_NOR_ID() in S3AN_INFO() Michael Walle
2023-09-18 5:22 ` Tudor Ambarus
2023-09-08 10:16 ` [PATCH v3 04/41] mtd: spi-nor: xilinx: remove addr_nbytes from S3AN_INFO() Michael Walle
2023-09-08 10:16 ` [PATCH v3 05/41] mtd: spi-nor: convert .n_sectors to .size Michael Walle
2023-09-19 9:24 ` Tudor Ambarus
2023-09-19 11:18 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 06/41] mtd: spi-nor: default page_size to 256 bytes Michael Walle
2023-09-08 10:16 ` [PATCH v3 07/41] mtd: spi-nor: store .n_banks in struct spi_nor_flash_parameter Michael Walle
2023-09-08 10:16 ` [PATCH v3 08/41] mtd: spi-nor: default .n_banks to 1 Michael Walle
2023-09-08 10:16 ` [PATCH v3 09/41] mtd: spi-nor: push 4k SE handling into spi_nor_select_uniform_erase() Michael Walle
2023-09-08 10:16 ` [PATCH v3 10/41] mtd: spi-nor: make sector_size optional Michael Walle
2023-09-19 9:25 ` Tudor Ambarus
2023-09-19 11:31 ` Michael Walle
2023-09-08 10:16 ` [PATCH v3 11/41] mtd: spi-nor: drop .parse_sfdp Michael Walle
2023-09-08 10:16 ` [PATCH v3 12/41] mtd: spi-nor: introduce (temporary) INFO0() Michael Walle
2023-09-08 10:16 ` [PATCH v3 13/41] mtd: spi-nor: move the .id and .id_len into an own structure Michael Walle
2023-09-08 10:16 ` [PATCH v3 14/41] mtd: spi-nor: rename .otp_org to .otp and make it a pointer Michael Walle
2023-09-08 10:16 ` [PATCH v3 15/41] mtd: spi-nor: add SNOR_ID() and SNOR_OTP() Michael Walle
2023-09-08 10:16 ` [PATCH v3 16/41] mtd: spi-nor: remove or move flash_info comments Michael Walle
2023-09-08 10:16 ` [PATCH v3 17/41] mtd: spi-nor: atmel: convert flash_info to new format Michael Walle
2023-09-08 10:16 ` [PATCH v3 18/41] mtd: spi-nor: eon: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 19/41] mtd: spi-nor: esmt: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 20/41] mtd: spi-nor: everspin: " Michael Walle
2023-09-19 9:24 ` Tudor Ambarus
2023-09-19 11:33 ` Michael Walle
2023-09-19 15:57 ` Tudor Ambarus
2023-09-08 10:16 ` [PATCH v3 21/41] mtd: spi-nor: gigadevice: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 22/41] mtd: spi-nor: intel: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 23/41] mtd: spi-nor: issi: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 24/41] mtd: spi-nor: macronix: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 25/41] mtd: spi-nor: micron-st: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 26/41] mtd: spi-nor: spansion: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 27/41] mtd: spi-nor: sst: " Michael Walle
2023-09-08 10:16 ` Michael Walle [this message]
2023-09-08 10:16 ` [PATCH v3 29/41] mtd: spi-nor: xilinx: use new macros in S3AN_INFO() Michael Walle
2023-09-08 10:16 ` [PATCH v3 30/41] mtd: spi-nor: xmc: convert flash_info to new format Michael Walle
2023-09-08 10:16 ` [PATCH v3 31/41] mtd: spi-nor: atmel: sort flash_info database Michael Walle
2023-09-08 10:16 ` [PATCH v3 32/41] mtd: spi-nor: eon: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 33/41] mtd: spi-nor: gigadevice: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 34/41] mtd: spi-nor: issi: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 35/41] mtd: spi-nor: macronix: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 36/41] mtd: spi-nor: micron-st: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 37/41] mtd: spi-nor: spansion: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 38/41] mtd: spi-nor: sst: " Michael Walle
2023-09-08 10:16 ` [PATCH v3 39/41] mtd: spi-nor: winbond: sort flash_info entries Michael Walle
2023-09-08 10:16 ` [PATCH v3 40/41] mtd: spi-nor: atmel: drop duplicate entry Michael Walle
2023-09-08 10:16 ` [PATCH v3 41/41] mtd: spi-nor: core: get rid of the INFOx() macros Michael Walle
2023-09-19 9:39 ` [PATCH v3 00/41] mtd: spi-nor: clean the flash_info database up Tudor Ambarus
2023-09-19 11:35 ` Michael Walle
2023-09-19 16:02 ` Tudor Ambarus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230807-mtd-flash-info-db-rework-v3-28-e60548861b10@kernel.org \
--to=mwalle@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=pratyush@kernel.org \
--cc=richard@nod.at \
--cc=tudor.ambarus@linaro.org \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®