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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Arjan van de Ven <arjan@linux.intel.com>,
	Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	Michael Kelley <mikelley@microsoft.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	K Prateek Nayak <kprateek.nayak@amd.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Zhang Rui <rui.zhang@intel.com>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Feng Tang <feng.tang@intel.com>,
	Andy Shevchenko <andy@infradead.org>
Subject: [patch 35/53] x86/cpu/topology: Sanitize the APIC admission logic
Date: Mon,  7 Aug 2023 15:53:28 +0200 (CEST)	[thread overview]
Message-ID: <20230807135028.272781311@linutronix.de> (raw)
In-Reply-To: <20230807130108.853357011@linutronix.de>

Move the actually required content of generic_processor_id() into the call
sites and use common helper functions for them. This separates the early
boot registration and the ACPI hotplug mechanism completely which allows
further cleanups and improvements.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/cpu/topology.c |  160 +++++++++++++++++-------------------
 1 file changed, 78 insertions(+), 82 deletions(-)

--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -30,8 +30,10 @@ struct {
 	unsigned int		nr_assigned_cpus;
 	unsigned int		nr_disabled_cpus;
 	unsigned int		nr_rejected_cpus;
+	u32			boot_cpu_apic_id;
 } topo_info __read_mostly = {
 	.nr_assigned_cpus	= 1,
+	.boot_cpu_apic_id	= BAD_APICID,
 };
 
 /*
@@ -78,78 +80,6 @@ early_initcall(smp_init_primary_thread_m
 static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { }
 #endif
 
-static int topo_lookup_cpuid(u32 apic_id)
-{
-	int i;
-
-	/* CPU# to APICID mapping is persistent once it is established */
-	for (i = 0; i < topo_info.nr_assigned_cpus; i++) {
-		if (cpuid_to_apicid[i] == apic_id)
-			return i;
-	}
-	return -ENODEV;
-}
-
-/*
- * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids
- * and cpuid_to_apicid[] synchronized.
- */
-static int allocate_logical_cpuid(u32 apic_id)
-{
-	int cpu = topo_lookup_cpuid(apic_id);
-
-	if (cpu >= 0)
-		return cpu;
-
-	return topo_info.nr_assigned_cpus++;
-}
-
-static void cpu_update_apic(unsigned int cpu, u32 apic_id)
-{
-#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
-	early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id;
-#endif
-	cpuid_to_apicid[cpu] = apic_id;
-	set_cpu_possible(cpu, true);
-	set_bit(apic_id, phys_cpu_present_map);
-	set_cpu_present(cpu, true);
-
-	if (system_state != SYSTEM_BOOTING)
-		cpu_mark_primary_thread(cpu, apic_id);
-}
-
-static int generic_processor_info(int apicid)
-{
-	int cpu;
-
-	/* The boot CPU must be set before MADT/MPTABLE parsing happens */
-	if (cpuid_to_apicid[0] == BAD_APICID)
-		panic("Boot CPU APIC not registered yet\n");
-
-	if (apicid == boot_cpu_physical_apicid)
-		return 0;
-
-	if (disabled_cpu_apicid == apicid) {
-		int thiscpu = topo_info.nr_assigned_cpus + topo_info.nr_disabled_cpus;
-
-		pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n",
-			thiscpu, apicid);
-
-		topo_info.nr_rejected_cpus++;
-		return -ENODEV;
-	}
-
-	if (topo_info.nr_assigned_cpus >= nr_cpu_ids) {
-		pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids);
-		topo_info.nr_rejected_cpus++;
-		return -ENOSPC;
-	}
-
-	cpu = allocate_logical_cpuid(apicid);
-	cpu_update_apic(cpu, apicid);
-	return cpu;
-}
-
 static int __initdata setup_possible_cpus = -1;
 
 /*
@@ -217,6 +147,43 @@ static int __initdata setup_possible_cpu
 		set_cpu_possible(i, true);
 }
 
+static int topo_lookup_cpuid(u32 apic_id)
+{
+	int i;
+
+	/* CPU# to APICID mapping is persistent once it is established */
+	for (i = 0; i < topo_info.nr_assigned_cpus; i++) {
+		if (cpuid_to_apicid[i] == apic_id)
+			return i;
+	}
+	return -ENODEV;
+}
+
+static int topo_assign_cpunr(u32 apic_id)
+{
+	int cpu = topo_lookup_cpuid(apic_id);
+
+	if (cpu >= 0)
+		return cpu;
+
+	return topo_info.nr_assigned_cpus++;
+}
+
+static void topo_set_cpuids(unsigned int cpu, u32 apic_id, u32 acpi_id)
+{
+#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
+	early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id;
+	early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id;
+#endif
+	cpuid_to_apicid[cpu] = apic_id;
+
+	set_cpu_possible(cpu, true);
+	set_cpu_present(cpu, true);
+
+	if (system_state != SYSTEM_BOOTING)
+		cpu_mark_primary_thread(cpu, apic_id);
+}
+
 /**
  * topology_register_apic - Register an APIC in early topology maps
  * @apic_id:	The APIC ID to set up
@@ -229,17 +196,41 @@ void __init topology_register_apic(u32 a
 
 	if (apic_id >= MAX_LOCAL_APIC) {
 		pr_err_once("APIC ID %x exceeds kernel limit of: %x\n", apic_id, MAX_LOCAL_APIC - 1);
+		topo_info.nr_rejected_cpus++;
 		return;
 	}
 
-	if (!present) {
-		topo_info.nr_disabled_cpus++;
+	/* CPU numbers exhausted? */
+	if (topo_info.nr_assigned_cpus >= nr_cpu_ids) {
+		pr_warn_once("CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids);
+		topo_info.nr_rejected_cpus++;
 		return;
 	}
 
-	cpu = generic_processor_info(apic_id);
-	if (cpu >= 0)
-		early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id;
+	if (disabled_cpu_apicid == apic_id) {
+		pr_info("Disabling CPU as requested via 'disable_cpu_apicid=0x%x'.\n", apic_id);
+		topo_info.nr_rejected_cpus++;
+		return;
+	}
+
+	if (present) {
+		/*
+		 * Prevent double registration, which is valid in case of
+		 * the boot CPU APIC because that is registered before the
+		 * enumeration of the APICs via firmware parsers or VM
+		 * guest mechanisms.
+		 */
+		if (test_and_set_bit(apic_id, phys_cpu_present_map))
+			return;
+
+		if (apic_id == topo_info.boot_cpu_apic_id)
+			cpu = 0;
+		else
+			cpu = topo_assign_cpunr(apic_id);
+		topo_set_cpuids(cpu, apic_id, acpi_id);
+	} else {
+		topo_info.nr_disabled_cpus++;
+	}
 }
 
 /**
@@ -250,8 +241,10 @@ void __init topology_register_apic(u32 a
  */
 void __init topology_register_boot_apic(u32 apic_id)
 {
-	cpuid_to_apicid[0] = apic_id;
-	cpu_update_apic(0, apic_id);
+	WARN_ON_ONCE(topo_info.boot_cpu_apic_id != BAD_APICID);
+
+	topo_info.boot_cpu_apic_id = apic_id;
+	topology_register_apic(apic_id, CPU_ACPIID_INVALID, true);
 }
 
 #ifdef CONFIG_ACPI_HOTPLUG_CPU
@@ -269,10 +262,13 @@ int topology_hotplug_apic(u32 apic_id, u
 
 	cpu = topo_lookup_cpuid(apic_id);
 	if (cpu < 0) {
-		cpu = generic_processor_info(apic_id);
-		if (cpu >= 0)
-			per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id;
+		if (topo_info.nr_assigned_cpus >= nr_cpu_ids)
+			return -ENOSPC;
+
+		cpu = topo_assign_cpunr(apic_id);
 	}
+	set_bit(apic_id, phys_cpu_present_map);
+	topo_set_cpuids(cpu, apic_id, acpi_id);
 	return cpu;
 }
 


  parent reply	other threads:[~2023-08-07 13:54 UTC|newest]

Thread overview: 98+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-07 13:52 [patch 00/53] x86/topology: The final installment Thomas Gleixner
2023-08-07 13:52 ` [patch 01/53] x86/cpu/topology: Cure off by one in fake_topology() Thomas Gleixner
2023-08-07 13:52 ` [patch 02/53] x86/cpu/topology: Make the APIC mismatch warnings complete Thomas Gleixner
2023-08-07 14:28   ` Arjan van de Ven
2023-08-07 14:54     ` Thomas Gleixner
2023-08-07 13:52 ` [patch 03/53] x86/platform/ce4100: Dont override x86_init.mpparse.setup_ioapic_ids Thomas Gleixner
2023-08-07 15:20   ` Andy Shevchenko
2023-08-07 13:52 ` [patch 04/53] x86/ioapic: Replace some more set bit nonsense Thomas Gleixner
2023-08-07 13:52 ` [patch 05/53] x86/apic: Get rid of get_physical_broadcast() Thomas Gleixner
2023-08-07 15:24   ` Andy Shevchenko
2023-08-07 13:52 ` [patch 06/53] x86/ioapic: Make io_apic_get_unique_id() simpler Thomas Gleixner
2023-08-07 13:52 ` [patch 07/53] x86/ioapic: Simplify setup_ioapic_ids_from_mpc_nocheck() Thomas Gleixner
2023-08-07 13:52 ` [patch 08/53] x86/apic: Remove check_apicid_used() and ioapic_phys_id_map() Thomas Gleixner
2023-08-07 13:52 ` [patch 09/53] x86/mpparse: Rename default_find_smp_config() Thomas Gleixner
2023-08-07 16:03   ` Andy Shevchenko
2023-08-07 17:21     ` Thomas Gleixner
2023-08-07 13:52 ` [patch 10/53] x86/mpparse: Provide separate early/late callbacks Thomas Gleixner
2023-08-07 13:52 ` [patch 11/53] x86/mpparse: Prepare for callback separation Thomas Gleixner
2023-08-07 13:52 ` [patch 12/53] x86/dtb: Rename x86_dtb_init() Thomas Gleixner
2023-08-07 13:52 ` [patch 13/53] x86/platform/ce4100: Prepare for separate mpparse callbacks Thomas Gleixner
2023-08-07 13:52 ` [patch 14/53] x86/platform/intel-mid: " Thomas Gleixner
2023-08-07 16:07   ` Andy Shevchenko
2023-08-07 13:52 ` [patch 15/53] x86/jailhouse: " Thomas Gleixner
2023-08-07 13:52 ` [patch 16/53] x86/xen/smp_pv: " Thomas Gleixner
2023-08-07 13:53 ` [patch 17/53] x86/mpparse: Switch to new init callbacks Thomas Gleixner
2023-08-07 13:53 ` [patch 18/53] x86/mm/numa: Move early mptable evaluation into common code Thomas Gleixner
2023-08-07 13:53 ` [patch 19/53] x86/mpparse: Remove the physid_t bitmap wrapper Thomas Gleixner
2023-08-08 11:37   ` Andy Shevchenko
2023-08-07 13:53 ` [patch 20/53] x86/apic: Remove the pointless writeback of boot_cpu_physical_apicid Thomas Gleixner
2023-08-07 13:53 ` [patch 21/53] x86/apic: Remove yet another dubious callback Thomas Gleixner
2023-08-07 13:53 ` [patch 22/53] x86/apic: Use a proper define for invalid ACPI CPU ID Thomas Gleixner
2023-08-07 13:53 ` [patch 23/53] x86/cpu/topology: Move registration out of APIC code Thomas Gleixner
2023-08-07 13:53 ` [patch 24/53] x86/cpu/topology: Provide separate APIC registration functions Thomas Gleixner
2023-08-11 12:32   ` Zhang, Rui
2023-08-07 13:53 ` [patch 25/53] x86/acpi: Use new " Thomas Gleixner
2023-08-07 15:27   ` Peter Zijlstra
2023-08-07 15:35     ` Andrew Cooper
2023-08-07 15:41     ` Thomas Gleixner
2023-08-07 13:53 ` [patch 26/53] x86/jailhouse: Use new APIC registration function Thomas Gleixner
2023-08-07 13:53 ` [patch 27/53] x86/of: Use new APIC registration functions Thomas Gleixner
2023-08-07 13:53 ` [patch 28/53] x86/mpparse: Use new APIC registration function Thomas Gleixner
2023-08-07 13:53 ` [patch 29/53] x86/acpi: Dont invoke topology_register_apic() for XEN PV Thomas Gleixner
2023-08-07 13:53 ` [patch 30/53] x86/xen/smp_pv: Register fake APICs Thomas Gleixner
2023-08-07 13:53 ` [patch 31/53] x86/cpu/topology: Confine topology information Thomas Gleixner
2023-08-07 13:53 ` [patch 32/53] x86/cpu/topology: Simplify APIC registration Thomas Gleixner
2023-08-07 13:53 ` [patch 33/53] x86/cpu/topology: Use a data structure for topology info Thomas Gleixner
2023-08-07 13:53 ` [patch 34/53] x86/smpboot: Make error message actually useful Thomas Gleixner
2023-08-07 13:53 ` Thomas Gleixner [this message]
2023-08-07 13:53 ` [patch 36/53] x86/cpu/topology: Rework possible CPU management Thomas Gleixner
2023-08-14  8:29   ` Zhang, Rui
2023-08-07 13:53 ` [patch 37/53] x86/cpu: Detect real BSP on crash kernels Thomas Gleixner
2024-01-08 14:11   ` Zhang, Rui
2024-01-08 14:54     ` Thomas Gleixner
2024-01-08 16:13       ` Thomas Gleixner
2024-01-09  1:54         ` Zhang, Rui
2024-01-10 14:19           ` Thomas Gleixner
2024-01-10 15:14             ` Thomas Gleixner
2024-01-11  1:52               ` Zhang, Rui
2024-01-12  9:14               ` Zhang, Rui
2024-01-12 15:39                 ` Thomas Gleixner
2024-01-13  7:35                   ` Zhang, Rui
2024-01-15  9:41                     ` Thomas Gleixner
2023-08-07 13:53 ` [patch 38/53] x86/topology: Add a mechanism to track topology via APIC IDs Thomas Gleixner
2023-08-07 13:53 ` [patch 39/53] x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug Thomas Gleixner
2023-08-07 13:53 ` [patch 40/53] x86/cpu/topology: Assign hotpluggable CPUIDs during init Thomas Gleixner
2023-08-07 13:53 ` [patch 41/53] x86/xen/smp_pv: Count number of vCPUs early Thomas Gleixner
2023-08-07 13:53 ` [patch 42/53] x86/cpu/topology: Let XEN/PV use topology from CPUID/MADT Thomas Gleixner
2023-08-07 13:53 ` [patch 43/53] x86/cpu/topology: Use topology bitmaps for sizing Thomas Gleixner
2023-08-07 13:53 ` [patch 44/53] x86/cpu/topology: Mop up primary thread mask handling Thomas Gleixner
2023-08-07 13:53 ` [patch 45/53] x86/cpu/topology: Simplify cpu_mark_primary_thread() Thomas Gleixner
2023-08-07 13:53 ` [patch 46/53] x86/cpu/topology: Provide logical pkg/die mapping Thomas Gleixner
2023-08-07 13:53 ` [patch 47/53] x86/cpu/topology: Use topology logical mapping mechanism Thomas Gleixner
2023-08-07 13:53 ` [patch 48/53] x86/cpu/topology: Retrieve cores per package from topology bitmaps Thomas Gleixner
2023-08-07 13:53 ` [patch 49/53] x86: Use topology functions instead of smp_num_siblings where applicable Thomas Gleixner
2023-08-07 13:53 ` [patch 50/53] x86/cpu/topology: Rename smp_num_siblings Thomas Gleixner
2023-08-07 13:53 ` [patch 51/53] x86/cpu/topology: Rename topology_max_die_per_package() Thomas Gleixner
2023-08-07 13:53 ` [patch 52/53] x86/cpu/topology: Provide __num_[cores|threads]_per_package Thomas Gleixner
2023-08-07 13:53 ` [patch 53/53] x86/cpu/topology: Get rid of cpuinfo::x86_max_cores Thomas Gleixner
2023-08-11 15:44   ` Zhang, Rui
2023-12-14 14:00   ` Zhang, Rui
2023-08-08  7:40 ` [patch 00/53] x86/topology: The final installment Juergen Gross
2023-08-08 11:20   ` Andrew Cooper
2023-08-08 18:55     ` Thomas Gleixner
2023-08-08 18:29 ` Sohil Mehta
2023-08-08 19:10   ` Thomas Gleixner
2023-08-08 20:30     ` Sohil Mehta
2023-08-08 20:41       ` Thomas Gleixner
2023-08-08 22:10         ` Peter Zijlstra
2023-08-08 22:58           ` Sohil Mehta
2023-08-08 23:20             ` Thomas Gleixner
2023-08-09 16:55               ` Sohil Mehta
2023-08-10  3:28               ` Zhang, Rui
2023-08-09 16:50             ` Qiuxu Zhuo
2023-08-09 17:23               ` Sohil Mehta
2023-08-10  1:33                 ` Zhuo, Qiuxu
2023-08-08 20:57       ` Thomas Gleixner
2023-08-09 16:12 ` Qiuxu Zhuo
2023-08-12 13:51 ` Michael Kelley (LINUX)

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