From: Hugo Villeneuve <hugo@hugovil.com>
To: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Cc: <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
<bhelgaas@google.com>, <krzysztof.kozlowski@linaro.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<lpieralisi@kernel.org>, <bharat.kumar.gogada@amd.com>,
<michal.simek@amd.com>, <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example.
Date: Tue, 8 Aug 2023 13:16:41 -0400 [thread overview]
Message-ID: <20230808131641.ebafb9e042c7463e55c7fb00@hugovil.com> (raw)
In-Reply-To: <20230808103733.93707-3-thippeswamy.havalige@amd.com>
On Tue, 8 Aug 2023 16:07:32 +0530
Thippeswamy Havalige <thippeswamy.havalige@amd.com> wrote:
Hi,
drop the final dot in all commit titles.
Hugo Villeneuve.
> Update ECAM size in example to discover up to 256 buses.
>
> Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
> ---
> changes in v2:
> None.
> changes in v1:
> None.
> ---
> Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
> index 8976025..426f90a 100644
> --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml
> @@ -118,7 +118,7 @@ examples:
> compatible = "xlnx,nwl-pcie-2.11";
> reg = <0x0 0xfd0e0000 0x0 0x1000>,
> <0x0 0xfd480000 0x0 0x1000>,
> - <0x80 0x00000000 0x0 0x1000000>;
> + <0x80 0x00000000 0x0 0x10000000>;
> reg-names = "breg", "pcireg", "cfg";
> ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
> <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
> --
> 1.8.3.1
>
next prev parent reply other threads:[~2023-08-08 21:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-08 10:37 [PATCH v2] PCI: xilinx-nwl: Remove unnecessary code which updates primary,secondary and sub-ordinate bus numbers Thippeswamy Havalige
2023-08-08 10:37 ` [PATCH v2 0/2] Increase ecam size value to discover 256 buses during Thippeswamy Havalige
2023-08-08 10:37 ` [PATCH v2 1/2] dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example Thippeswamy Havalige
2023-08-08 17:16 ` Hugo Villeneuve [this message]
2023-08-08 10:37 ` [PATCH v2 2/2] PCI: xilinx-nwl: Increase ECAM size to accommodate 256 buses Thippeswamy Havalige
2023-08-08 15:49 ` Bjorn Helgaas
2023-08-08 15:56 ` [PATCH v2] PCI: xilinx-nwl: Remove unnecessary code which updates primary,secondary and sub-ordinate bus numbers Bjorn Helgaas
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