From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CC21EB64DD for ; Mon, 14 Aug 2023 19:52:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231633AbjHNTwA (ORCPT ); Mon, 14 Aug 2023 15:52:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232280AbjHNTv4 (ORCPT ); Mon, 14 Aug 2023 15:51:56 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34D8FFA for ; Mon, 14 Aug 2023 12:51:56 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C706D6146F for ; Mon, 14 Aug 2023 19:51:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E28DBC433C8; Mon, 14 Aug 2023 19:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692042715; bh=49iSU5AQDaX/+FEOchcMQaaxJUj98rtv3qX05nA5C4Q=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=qaiPXvIBrIoW9/wu/kdBhWgnBZIdQZtVXE991Td1wuMbJxK1OHytRezFCu2nroz9s v8DZ7NCqDvJpMnB+H/jfdZ1DwzOpU/YfW53MY63qIYUj6EwSM4wgi+oVvV7RQ+ut/E wcKJgz0UeXn1yDxAEDcPTgRsGM9txDDv2EhWcGExl084jqvFGQlwVXMq7j+Qjd5cbJ lCiBkNsdswPwOQNOQQQ5B52RJ2ZwCsyTgq5NN/V/mNiPTTaSpk0Rx2u7McrZYlPnZ8 ajRKsHqHnVv8n3ZIfln7WlrT3cMe1YatY/5WWjqykrjfpeYYSyJVJsT45L5rGzXucD VZ6knWFOuqnNg== Date: Mon, 14 Aug 2023 12:51:53 -0700 From: Josh Poimboeuf To: Borislav Petkov Cc: Peter Zijlstra , x86@kernel.org, linux-kernel@vger.kernel.org, David.Kaplan@amd.com, Andrew.Cooper3@citrix.com, gregkh@linuxfoundation.org, nik.borisov@suse.com Subject: Re: [PATCH v2 00/11] Fix up SRSO stuff Message-ID: <20230814195153.2zxtp6zx552trgh6@treble> References: <20230814114426.057251214@infradead.org> <20230814164447.GFZNpZ/64H4lENIe94@fat_crate.local> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20230814164447.GFZNpZ/64H4lENIe94@fat_crate.local> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 14, 2023 at 06:44:47PM +0200, Borislav Petkov wrote: > On Mon, Aug 14, 2023 at 01:44:26PM +0200, Peter Zijlstra wrote: > > The one open techinical issue I have with the mitigation is the alignment of > > the RET inside srso_safe_ret(). The details given for retbleed stated that RET > > should be on a 64byte boundary, which is not the case here. > > I have written this in the hope to make this more clear: > > /* > * Some generic notes on the untraining sequences: > * > * They are interchangeable when it comes to flushing potentially wrong > * RET predictions from the BTB. > * > * The SRSO Zen1/2 (MOVABS) untraining sequence is longer than the > * Retbleed sequence because the return sequence done there > * (srso_safe_ret()) is longer and the return sequence must fully nest > * (end before) the untraining sequence. Therefore, the untraining > * sequence must overlap the return sequence. > * > * Regarding alignment - the instructions which need to be untrained, > * must all start at a cacheline boundary for Zen1/2 generations. That > * is, both the ret in zen_untrain_ret() and srso_safe_ret() in the > * srso_untrain_ret() must both be placed at the beginning of > * a cacheline. > */ It's a good comment, but RET in srso_safe_ret() is still misaligned. Don't we need something like so? diff --git a/arch/x86/lib/retpoline.S b/arch/x86/lib/retpoline.S index 9bc19deacad1..373ac128a30a 100644 --- a/arch/x86/lib/retpoline.S +++ b/arch/x86/lib/retpoline.S @@ -251,13 +251,14 @@ __EXPORT_THUNK(retbleed_untrain_ret) * thus a "safe" one to use. */ .align 64 - .skip 64 - (srso_safe_ret - srso_untrain_ret), 0xcc + .skip 64 - (.Lsrso_ret - srso_untrain_ret), 0xcc SYM_START(srso_untrain_ret, SYM_L_GLOBAL, SYM_A_NONE) ANNOTATE_NOENDBR .byte 0x48, 0xb8 SYM_INNER_LABEL(srso_safe_ret, SYM_L_GLOBAL) lea 8(%_ASM_SP), %_ASM_SP +.Lsrso_ret: ret int3 int3