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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF0000150B.mail.protection.outlook.com (10.167.242.43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6699.14 via Frontend Transport; Thu, 17 Aug 2023 12:10:55 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 17 Aug 2023 07:10:54 -0500 Received: from xhdthippesw40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Thu, 17 Aug 2023 07:10:51 -0500 From: Thippeswamy Havalige To: , , CC: , , , , , , , "Thippeswamy Havalige" Subject: [PATCH v5 0/3] Increase ecam size value to discover 256 buses during Date: Thu, 17 Aug 2023 17:40:41 +0530 Message-ID: <20230817121044.8176-2-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230817121044.8176-1-thippeswamy.havalige@amd.com> References: <20230817121044.8176-1-thippeswamy.havalige@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150B:EE_|SA0PR12MB4463:EE_ X-MS-Office365-Filtering-Correlation-Id: 39c2c356-c4ea-4fd0-e751-08db9f1b0238 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2023 12:10:55.2649 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 39c2c356-c4ea-4fd0-e751-08db9f1b0238 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4463 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Current driver is supports up to 16 buses. The following code fixes to support up to 256 buses. update "NWL_ECAM_VALUE_DEFAULT " to 16 can access up to 256MB ECAM region to detect 256 buses. Update ecam size to 256MB in device tree binding example. Thippeswamy Havalige (3): dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example PCI: xilinx-nwl: Rename ECAM size default macro PCI: xilinx-nwl: Increase ECAM size to accommodate 256 buses Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +- drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++---- 2 files changed, 3 insertions(+), 5 deletions(-) -- 2.25.1