From: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
To: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, maz@kernel.org
Cc: Christoffer.Dall@arm.com, eauger@redhat.com,
miguel.luis@oracle.com, darren@os.amperecomputing.com,
scott@os.amperecomputing.com, gankulkarni@os.amperecomputing.com
Subject: [PATCH v2 2/2] KVM: arm64: timers: Save restore CVAL of a ptimer across guest entry and exits
Date: Mon, 4 Sep 2023 04:42:18 -0700 [thread overview]
Message-ID: <20230904114218.590304-3-gankulkarni@os.amperecomputing.com> (raw)
In-Reply-To: <20230904114218.590304-1-gankulkarni@os.amperecomputing.com>
As per FEAT_ECV, when HCR_EL2.{E2H, TGE} == {1, 1}, Enhanced Counter
Virtualization functionality is disabled and CNTPOFF_EL2 value is treated
as zero. On VHE host, E2H and TGE are set, hence it is required
to save Guest's CVAL to memory and increment it by CNTPOFF_EL2 at
guest exit to avoid false physical timer interrupts and also
restore back the CVAL with saved value before the guest entry.
Signed-off-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
---
arch/arm64/kvm/arch_timer.c | 60 ++++++++++++++++++++++++++++++---
arch/arm64/kvm/hyp/vhe/switch.c | 13 +++++++
include/kvm/arm_arch_timer.h | 1 +
3 files changed, 69 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
index 98b0e8ac02ae..9fe3fa6ed98a 100644
--- a/arch/arm64/kvm/arch_timer.c
+++ b/arch/arm64/kvm/arch_timer.c
@@ -514,6 +514,59 @@ static void set_cntpoff(u64 cntpoff)
write_sysreg_s(cntpoff, SYS_CNTPOFF_EL2);
}
+static void ptimer_cval_save(struct arch_timer_context *ctx, u64 offset)
+{
+ unsigned long flags;
+ u64 cval;
+
+ local_irq_save(flags);
+ cval = read_sysreg_el0(SYS_CNTP_CVAL);
+ timer_set_cval(ctx, cval);
+ cval += offset;
+ write_sysreg_el0(cval, SYS_CNTP_CVAL);
+ isb();
+ local_irq_restore(flags);
+}
+
+static void ptimer_cval_restore(struct arch_timer_context *ctx, u64 offset)
+{
+ unsigned long flags;
+ u64 cval;
+
+ local_irq_save(flags);
+ cval = timer_get_cval(ctx);
+ write_sysreg_el0(cval, SYS_CNTP_CVAL);
+ isb();
+ local_irq_restore(flags);
+}
+
+void kvm_ptimer_cval_save_restore(struct kvm_vcpu *vcpu, bool save)
+{
+ struct timer_map map;
+ struct arch_timer_cpu *timer;
+ struct arch_timer_context *ctxp;
+ u64 offset;
+
+ get_timer_map(vcpu, &map);
+ ctxp = map.direct_ptimer;
+
+ if (unlikely(ctxp == NULL))
+ return;
+
+ offset = timer_get_offset(ctxp);
+ if (!offset)
+ return;
+
+ timer = vcpu_timer(ctxp->vcpu);
+ if (!timer->enabled || !ctxp->loaded)
+ return;
+
+ if (save)
+ ptimer_cval_save(ctxp, offset);
+ else
+ ptimer_cval_restore(ctxp, offset);
+}
+
static void timer_save_state(struct arch_timer_context *ctx)
{
struct arch_timer_cpu *timer = vcpu_timer(ctx->vcpu);
@@ -562,9 +615,7 @@ static void timer_save_state(struct arch_timer_context *ctx)
timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTP_CTL));
cval = read_sysreg_el0(SYS_CNTP_CVAL);
- if (!has_cntpoff())
- cval -= timer_get_offset(ctx);
-
+ cval -= timer_get_offset(ctx);
timer_set_cval(ctx, cval);
/* Disable the timer */
@@ -650,8 +701,7 @@ static void timer_restore_state(struct arch_timer_context *ctx)
cval = timer_get_cval(ctx);
offset = timer_get_offset(ctx);
set_cntpoff(offset);
- if (!has_cntpoff())
- cval += offset;
+ cval += offset;
write_sysreg_el0(cval, SYS_CNTP_CVAL);
isb();
write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTP_CTL);
diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index 561cb53e19ce..097fcaf7b208 100644
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -100,6 +100,10 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
hcr |= vhcr_el2;
}
+ /* Restore CVAL */
+ if (has_cntpoff())
+ kvm_ptimer_cval_save_restore(vcpu, false);
+
___activate_traps(vcpu, hcr);
val = read_sysreg(cpacr_el1);
@@ -141,6 +145,15 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
___deactivate_traps(vcpu);
+ /*
+ * For VHE Host, HCR_EL2.{E2H, TGE} is {1, 1}, FEAT_ECV
+ * is disabled and CNTPOFF_EL2 value is treated as zero.
+ * Hence, need to save guest written CVAL in memory and
+ * increment PTIMER's CVAL by CNTPOFF to avoid false interrupt.
+ */
+ if (has_cntpoff())
+ kvm_ptimer_cval_save_restore(vcpu, true);
+
write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
/*
diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
index ea77a569a907..ce3f4d9e7dd4 100644
--- a/include/kvm/arm_arch_timer.h
+++ b/include/kvm/arm_arch_timer.h
@@ -117,6 +117,7 @@ void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu);
void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
void kvm_timer_init_vhe(void);
+void kvm_ptimer_cval_save_restore(struct kvm_vcpu *vcpu, bool save);
#define vcpu_timer(v) (&(v)->arch.timer_cpu)
#define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)])
--
2.41.0
next prev parent reply other threads:[~2023-09-04 11:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-04 11:42 [PATCH v2 0/2] Avoid spurious ptimer interrupts for non-zero cntpoff Ganapatrao Kulkarni
2023-09-04 11:42 ` [PATCH v2 1/2] KVM: arm64: timers: Move helper has_cntpoff to a header file Ganapatrao Kulkarni
2023-09-04 11:42 ` Ganapatrao Kulkarni [this message]
2023-09-10 11:45 ` [PATCH v2 2/2] KVM: arm64: timers: Save restore CVAL of a ptimer across guest entry and exits Marc Zyngier
2023-09-15 9:57 ` Ganapatrao Kulkarni
2023-09-18 11:29 ` Marc Zyngier
2023-09-19 6:15 ` Ganapatrao Kulkarni
2023-09-24 9:48 ` Marc Zyngier
2023-09-25 5:35 ` Ganapatrao Kulkarni
2023-09-25 5:40 ` Ganapatrao Kulkarni
2023-10-10 4:54 ` Ganapatrao Kulkarni
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