From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D0ABEE57E0 for ; Fri, 8 Sep 2023 08:20:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238311AbjIHIU6 (ORCPT ); Fri, 8 Sep 2023 04:20:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237979AbjIHIU4 (ORCPT ); Fri, 8 Sep 2023 04:20:56 -0400 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E844B1BDA for ; Fri, 8 Sep 2023 01:20:50 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qeWjR-00053g-8L; Fri, 08 Sep 2023 10:20:49 +0200 Received: from [2a0a:edc0:2:b01:1d::c0] (helo=ptx.whiteo.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1qeWjN-004q5L-09; Fri, 08 Sep 2023 10:20:45 +0200 Received: from mtr by ptx.whiteo.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1qeWjM-003FNe-MO; Fri, 08 Sep 2023 10:20:44 +0200 Date: Fri, 8 Sep 2023 10:20:44 +0200 From: Michael Tretter To: Maxim Schwalm Cc: kernel@pengutronix.de, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter Subject: Re: [PATCH 5/5] drm/bridge: samsung-dsim: calculate porches in Hz Message-ID: <20230908082044.GA767994@pengutronix.de> References: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> <20230818-samsung-dsim-v1-5-b39716db6b7a@pengutronix.de> <53ee3d14-05f4-981f-26d2-ef9ef6b3a61b@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <53ee3d14-05f4-981f-26d2-ef9ef6b3a61b@gmail.com> X-Sent-From: Pengutronix Hildesheim X-URL: http://www.pengutronix.de/ X-Accept-Language: de,en X-Accept-Content-Type: text/plain User-Agent: Mutt/1.10.1 (2018-07-13) X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 04 Sep 2023 16:28:37 +0200, Maxim Schwalm wrote: > On 28.08.23 17:59, Michael Tretter wrote: > > Calculating the byte_clk in kHz is imprecise for a hs_clock of 55687500 > > Hz, which may be used with a pixel clock of 74.25 MHz with mode > > 1920x1080-30. > > > > Fix the calculation by using HZ instead of kHZ. > > > > This requires to change the type to u64 to prevent overflows of the > > integer type. > > > > Signed-off-by: Michael Tretter > > --- > > drivers/gpu/drm/bridge/samsung-dsim.c | 10 ++++++---- > > 1 file changed, 6 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c > > index 459be953be55..eb7aca2b9ab7 100644 > > --- a/drivers/gpu/drm/bridge/samsung-dsim.c > > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c > > @@ -973,10 +973,12 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi) > > u32 reg; > > > > if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { > > - int byte_clk_khz = dsi->hs_clock / 1000 / 8; > > - int hfp = DIV_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk_khz, m->clock); > > - int hbp = DIV_ROUND_UP((m->htotal - m->hsync_end) * byte_clk_khz, m->clock); > > - int hsa = DIV_ROUND_UP((m->hsync_end - m->hsync_start) * byte_clk_khz, m->clock); > > + u64 byte_clk = dsi->hs_clock / 8; > > + u64 pix_clk = m->clock * 1000; > > + > > + int hfp = DIV64_U64_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk, pix_clk); > > + int hbp = DIV64_U64_ROUND_UP((m->htotal - m->hsync_end) * byte_clk, pix_clk); > > + int hsa = DIV64_U64_ROUND_UP((m->hsync_end - m->hsync_start) * byte_clk, pix_clk); > > Wouldn't it make sense to use the videomode structure here? That would introduce a dependency on VIDEOMODE_HELPERS to avoid four explicit calculations of the pixel clock in Hz and the porches in pixels. I don't think that's really worth it. Michael > > > > > /* remove packet overhead when possible */ > > hfp = max(hfp - 6, 0); > > > > Best regards, > Maxim >