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J . Mercier" Subject: [PATCH 4/4] iommu/mediatek: mt8188: Enable secure bank for MM IOMMU Date: Mon, 11 Sep 2023 09:17:51 +0800 Message-ID: <20230911011751.29906-5-yong.wu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230911011751.29906-1-yong.wu@mediatek.com> References: <20230911011751.29906-1-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.598800-8.000000 X-TMASE-MatchedRID: B3Nm01t+RNhCFB88XbRv2bEKX02srTXIecN1rDssvvDfUZT83lbkEN6M yUV+2+DZGlJMOm/5VnDPKWCeeNrZI1xxDx5qbkR9FEUknJ/kEl4YSQiB0ZTudfoLR4+zsDTt+GY UedkXNWqL/HZHDiyt++LzVTV0D0HpQEFsbYa5mcq99t6fBcMggP3DHWJiJx+xOZ4YLhUX84hl1c /Yz0rsldD5p8F+rstIdazI6Mv0D0LyNp7g4PXe0BXsxz6ujBxUq1f8XSkHBUmNJXmEMVvLtmcjF nImzvyS X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.598800-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: A88BD7686A6A1EF7415F10E6A74A8CDC5FA3F3BCB510FDC2C554BB6F39BEFA0D2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable secure bank for MT8188 VDO IOMMU and VPP IOMMU to support secure video path (SVP) feature. The last bank is the secure bank. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 24d7f5138f7b..f17046157c79 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -1667,11 +1667,11 @@ static const struct mtk_iommu_plat_data mt8188_data_vdo = { .m4u_plat = M4U_MT8188, .flags = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN | WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | - PGTABLE_PA_35_EN | MTK_IOMMU_TYPE_MM, + PGTABLE_PA_35_EN | MTK_IOMMU_TYPE_MM | SECURE_BANK_ENABLE, .hw_list = &m4ulist, .inv_sel_reg = REG_MMU_INV_SEL_GEN2, - .banks_num = 1, - .banks_enable = {true}, + .banks_num = 5, + .banks_enable = {true, false, false, false, true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), .iova_region_larb_msk = mt8188_larb_region_msk, @@ -1684,11 +1684,11 @@ static const struct mtk_iommu_plat_data mt8188_data_vpp = { .m4u_plat = M4U_MT8188, .flags = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN | WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | - PGTABLE_PA_35_EN | MTK_IOMMU_TYPE_MM, + PGTABLE_PA_35_EN | MTK_IOMMU_TYPE_MM | SECURE_BANK_ENABLE, .hw_list = &m4ulist, .inv_sel_reg = REG_MMU_INV_SEL_GEN2, - .banks_num = 1, - .banks_enable = {true}, + .banks_num = 5, + .banks_enable = {true, false, false, false, true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), .iova_region_larb_msk = mt8188_larb_region_msk, -- 2.25.1