From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Borislav Petkov <bp@alien8.de>,
"Chang S. Bae" <chang.seok.bae@intel.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Nikolay Borisov <nik.borisov@suse.com>
Subject: [patch V3 06/30] x86/microcode/intel: Cleanup code further
Date: Tue, 12 Sep 2023 09:57:52 +0200 (CEST) [thread overview]
Message-ID: <20230912065501.146684094@linutronix.de> (raw)
In-Reply-To: <20230912065249.695681286@linutronix.de>
From: Thomas Gleixner <tglx@linutronix.de>
Sanitize the microcode scan loop, fixup printks and move the initrd loading
function next to the place where it is used and mark it __init.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: Fix changelog - Nikolay
---
arch/x86/kernel/cpu/microcode/intel.c | 76 ++++++++++++++--------------------
1 file changed, 32 insertions(+), 44 deletions(-)
---
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -36,7 +36,7 @@ static const char ucode_path[] = "kernel
static struct microcode_intel *intel_ucode_patch __read_mostly;
/* last level cache size per core */
-static int llc_size_per_core __ro_after_init;
+static unsigned int llc_size_per_core __ro_after_init;
/* microcode format is extended from prescott processors */
struct extended_signature {
@@ -296,29 +296,6 @@ static struct microcode_intel *scan_micr
return patch;
}
-static bool load_builtin_intel_microcode(struct cpio_data *cp)
-{
- unsigned int eax = 1, ebx, ecx = 0, edx;
- struct firmware fw;
- char name[30];
-
- if (IS_ENABLED(CONFIG_X86_32))
- return false;
-
- native_cpuid(&eax, &ebx, &ecx, &edx);
-
- sprintf(name, "intel-ucode/%02x-%02x-%02x",
- x86_family(eax), x86_model(eax), x86_stepping(eax));
-
- if (firmware_request_builtin(&fw, name)) {
- cp->size = fw.size;
- cp->data = (void *)fw.data;
- return true;
- }
-
- return false;
-}
-
static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
{
struct microcode_intel *mc;
@@ -362,6 +339,28 @@ static int apply_microcode_early(struct
return 0;
}
+static bool load_builtin_intel_microcode(struct cpio_data *cp)
+{
+ unsigned int eax = 1, ebx, ecx = 0, edx;
+ struct firmware fw;
+ char name[30];
+
+ if (IS_ENABLED(CONFIG_X86_32))
+ return false;
+
+ native_cpuid(&eax, &ebx, &ecx, &edx);
+
+ sprintf(name, "intel-ucode/%02x-%02x-%02x",
+ x86_family(eax), x86_model(eax), x86_stepping(eax));
+
+ if (firmware_request_builtin(&fw, name)) {
+ cp->size = fw.size;
+ cp->data = (void *)fw.data;
+ return true;
+ }
+ return false;
+}
+
int __init save_microcode_in_initrd_intel(void)
{
struct ucode_cpu_info uci;
@@ -434,25 +433,16 @@ void load_ucode_intel_ap(void)
apply_microcode_early(&uci, true);
}
-/* Accessor for microcode pointer */
-static struct microcode_intel *ucode_get_patch(void)
-{
- return intel_ucode_patch;
-}
-
void reload_ucode_intel(void)
{
- struct microcode_intel *p;
struct ucode_cpu_info uci;
intel_cpu_collect_info(&uci);
- p = ucode_get_patch();
- if (!p)
+ uci.mc = intel_ucode_patch;
+ if (!uci.mc)
return;
- uci.mc = p;
-
apply_microcode_early(&uci, false);
}
@@ -490,8 +480,7 @@ static enum ucode_state apply_microcode_
if (WARN_ON(raw_smp_processor_id() != cpu))
return UCODE_ERROR;
- /* Look for a newer patch in our cache: */
- mc = ucode_get_patch();
+ mc = intel_ucode_patch;
if (!mc) {
mc = uci->mc;
if (!mc)
@@ -682,18 +671,17 @@ static enum ucode_state request_microcod
}
static struct microcode_ops microcode_intel_ops = {
- .request_microcode_fw = request_microcode_fw,
- .collect_cpu_info = collect_cpu_info,
- .apply_microcode = apply_microcode_intel,
+ .request_microcode_fw = request_microcode_fw,
+ .collect_cpu_info = collect_cpu_info,
+ .apply_microcode = apply_microcode_intel,
};
-static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c)
+static __init void calc_llc_size_per_core(struct cpuinfo_x86 *c)
{
u64 llc_size = c->x86_cache_size * 1024ULL;
do_div(llc_size, c->x86_max_cores);
-
- return (int)llc_size;
+ llc_size_per_core = (unsigned int)llc_size;
}
struct microcode_ops * __init init_intel_microcode(void)
@@ -706,7 +694,7 @@ struct microcode_ops * __init init_intel
return NULL;
}
- llc_size_per_core = calc_llc_size_per_core(c);
+ calc_llc_size_per_core(c);
return µcode_intel_ops;
}
next prev parent reply other threads:[~2023-09-12 7:58 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-12 7:57 [patch V3 00/30] x86/microcode: Cleanup and late loading enhancements Thomas Gleixner
2023-09-12 7:57 ` [patch V3 01/30] x86/microcode/32: Move early loading after paging enable Thomas Gleixner
2023-09-13 15:06 ` Borislav Petkov
2023-09-16 9:03 ` Chang S. Bae
2023-09-17 19:17 ` Thomas Gleixner
2023-09-19 14:54 ` [patch V3a " Thomas Gleixner
2023-09-12 7:57 ` [patch V3 02/30] x86/boot/32: Disable stackprotector and tracing for mk_early_pgtbl_32() Thomas Gleixner
2023-09-18 17:12 ` Borislav Petkov
2023-09-12 7:57 ` [patch V3 03/30] x86/microcode/intel: Rip out mixed stepping support for Intel CPUs Thomas Gleixner
2023-09-25 15:19 ` Qiuxu Zhuo
2023-09-12 7:57 ` [patch V3 04/30] x86/microcode/intel: Simplify scan_microcode() Thomas Gleixner
2023-09-19 12:52 ` Borislav Petkov
2023-09-12 7:57 ` [patch V3 05/30] x86/microcode/intel: Simplify and rename generic_load_microcode() Thomas Gleixner
2023-09-12 7:57 ` Thomas Gleixner [this message]
2023-09-19 14:13 ` [patch V3 06/30] x86/microcode/intel: Cleanup code further Borislav Petkov
2023-09-12 7:57 ` [patch V3 07/30] x86/microcode/intel: Simplify early loading Thomas Gleixner
2023-09-19 14:32 ` Borislav Petkov
2023-09-19 14:57 ` Thomas Gleixner
2023-09-19 17:35 ` Thomas Gleixner
2023-09-12 7:57 ` [patch V3 08/30] x86/microcode/intel: Save the microcode only after a successful late-load Thomas Gleixner
2023-09-20 14:39 ` Borislav Petkov
2023-09-25 15:30 ` Subject: " Qiuxu Zhuo
2023-09-12 7:57 ` [patch V3 09/30] x86/microcode/intel: Switch to kvmalloc() Thomas Gleixner
2023-09-25 15:43 ` Subject: " Qiuxu Zhuo
2023-09-12 7:57 ` [patch V3 10/30] x86/microcode/intel: Unify microcode apply() functions Thomas Gleixner
2023-09-21 10:07 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 11/30] x86/microcode/intel: Rework intel_cpu_collect_info() Thomas Gleixner
2023-09-12 7:58 ` [patch V3 12/30] x86/microcode/intel: Reuse intel_cpu_collect_info() Thomas Gleixner
2023-09-21 10:42 ` Borislav Petkov
2023-09-25 10:47 ` Thomas Gleixner
2023-10-03 14:14 ` Borislav Petkov
2023-10-03 14:23 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 13/30] x86/microcode/intel: Rework intel_find_matching_signature() Thomas Gleixner
2023-09-12 7:58 ` [patch V3 14/30] x86/microcode/amd: Read revision from hardware in collect_cpu_info_amd() Thomas Gleixner
2023-09-12 7:58 ` [patch V3 15/30] x86/microcode: Remove pointless apply() invocation Thomas Gleixner
2023-09-12 7:58 ` [patch V3 16/30] x86/microcode: Get rid of the schedule work indirection Thomas Gleixner
2023-09-12 7:58 ` [patch V3 17/30] x86/microcode: Clean up mc_cpu_down_prep() Thomas Gleixner
2023-09-12 7:58 ` [patch V3 18/30] x86/microcode: Handle "nosmt" correctly Thomas Gleixner
2023-09-22 13:42 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 19/30] x86/microcode: Clarify the late load logic Thomas Gleixner
2023-09-22 15:59 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 20/30] x86/microcode: Sanitize __wait_for_cpus() Thomas Gleixner
2023-09-22 16:24 ` Borislav Petkov
2023-09-26 8:51 ` Thomas Gleixner
2023-09-27 7:56 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 21/30] x86/microcode: Add per CPU result state Thomas Gleixner
2023-09-24 6:29 ` Borislav Petkov
2023-09-26 9:09 ` Thomas Gleixner
2023-09-27 11:28 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 22/30] x86/microcode: Add per CPU control field Thomas Gleixner
2023-09-24 6:47 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 23/30] x86/microcode: Provide new control functions Thomas Gleixner
2023-09-24 6:58 ` Borislav Petkov
2023-09-26 9:42 ` Thomas Gleixner
2023-09-27 11:50 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 24/30] x86/microcode: Replace the all in one rendevouz handler Thomas Gleixner
2023-09-27 16:47 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 25/30] x86/microcode: Rendezvous and load in NMI Thomas Gleixner
2023-09-27 17:17 ` Borislav Petkov
2023-09-28 9:33 ` Thomas Gleixner
2023-09-12 7:58 ` [patch V3 26/30] x86/microcode: Protect against instrumentation Thomas Gleixner
2023-09-28 10:52 ` Borislav Petkov
2023-09-12 7:58 ` [patch V3 27/30] x86/apic: Provide apic_force_nmi_on_cpu() Thomas Gleixner
2023-09-12 7:58 ` [patch V3 28/30] x86/microcode: Handle "offline" CPUs correctly Thomas Gleixner
2023-09-12 7:58 ` [patch V3 29/30] x86/microcode: Prepare for minimal revision check Thomas Gleixner
2023-09-28 11:47 ` Borislav Petkov
2023-10-02 9:42 ` Thomas Gleixner
2023-09-12 7:58 ` [patch V3 30/30] x86/microcode/intel: Add a minimum required revision for late-loads Thomas Gleixner
2023-09-25 16:20 ` Qiuxu Zhuo
2023-09-25 17:02 ` [patch V3 00/30] x86/microcode: Cleanup and late loading enhancements Qiuxu Zhuo
2023-09-28 12:00 ` Borislav Petkov
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