From: Randy Dunlap <rdunlap@infradead.org>
To: linux-kernel@vger.kernel.org
Cc: Randy Dunlap <rdunlap@infradead.org>,
kernel test robot <lkp@intel.com>,
Chris Zankel <chris@zankel.net>,
Max Filippov <jcmvbkbc@gmail.com>
Subject: [PATCH 01/16] xtensa: FSF: define XCHAL_HAVE_DIV32
Date: Tue, 19 Sep 2023 22:21:24 -0700 [thread overview]
Message-ID: <20230920052139.10570-2-rdunlap@infradead.org> (raw)
In-Reply-To: <20230920052139.10570-1-rdunlap@infradead.org>
When variant FSF is set, XCHAL_HAVE_DIV32 is not defined,
so add the define for FSF to prevent build warnings:
arch/xtensa/lib/divsi3.S:9:5: warning: "XCHAL_HAVE_DIV32" is not defined, evaluates to 0 [-Wundef]
9 | #if XCHAL_HAVE_DIV32
arch/xtensa/lib/modsi3.S:9:5: warning: "XCHAL_HAVE_DIV32" is not defined, evaluates to 0 [-Wundef]
9 | #if XCHAL_HAVE_DIV32
Fixes: 173d6681380a ("xtensa: remove extra header files")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Closes: lore.kernel.org/r/202309150556.t0yCdv3g-lkp@intel.com
Cc: Chris Zankel <chris@zankel.net>
Cc: Max Filippov <jcmvbkbc@gmail.com>
---
arch/xtensa/variants/fsf/include/variant/core.h | 1 +
1 file changed, 1 insertion(+)
diff -- a/arch/xtensa/variants/fsf/include/variant/core.h b/arch/xtensa/variants/fsf/include/variant/core.h
--- a/arch/xtensa/variants/fsf/include/variant/core.h
+++ b/arch/xtensa/variants/fsf/include/variant/core.h
@@ -41,6 +41,7 @@
#define XCHAL_HAVE_MUL16 0 /* MUL16S/MUL16U instructions */
#define XCHAL_HAVE_MUL32 0 /* MULL instruction */
#define XCHAL_HAVE_MUL32_HIGH 0 /* MULUH/MULSH instructions */
+#define XCHAL_HAVE_DIV32 0 /* QUOS/QUOU/REMS/REMU instructions */
#define XCHAL_HAVE_L32R 1 /* L32R instruction */
#define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */
#define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */
next prev parent reply other threads:[~2023-09-20 5:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 5:21 [PATCH 00/16] xtensa: fix W=1 build warnings Randy Dunlap
2023-09-20 5:21 ` Randy Dunlap [this message]
2023-09-20 11:53 ` [PATCH 01/16] xtensa: FSF: define XCHAL_HAVE_DIV32 Max Filippov
2023-09-20 5:21 ` [PATCH 02/16] xtensa: fault: include <asm/traps.h> Randy Dunlap
2023-09-20 5:21 ` [PATCH 03/16] xtensa: irq: " Randy Dunlap
2023-09-20 5:21 ` [PATCH 04/16] xtensa: ptrace: add prototypes to <asm/ptrace.h> Randy Dunlap
2023-09-20 5:21 ` [PATCH 05/16] xtensa: processor.h: add init_arch() prototype Randy Dunlap
2023-09-20 5:21 ` [PATCH 06/16] xtensa: signal: include headers for function prototypes Randy Dunlap
2023-09-20 5:21 ` [PATCH 07/16] xtensa: stacktrace: include <asm/ftrace.h> for prototype Randy Dunlap
2023-09-20 5:21 ` [PATCH 08/16] xtensa: traps: add <linux/cpu.h> for function prototype Randy Dunlap
2023-09-20 5:21 ` [PATCH 09/16] irqchip: irq-xtensa-mx: include header for missing prototype Randy Dunlap
2023-09-20 9:51 ` Marc Zyngier
2023-09-20 10:53 ` Max Filippov
2023-09-20 5:21 ` [PATCH 10/16] xtensa: smp: add headers for missing function prototypes Randy Dunlap
2023-09-20 5:21 ` [PATCH 11/16] xtensa: hw_breakpoint: include header for missing prototype Randy Dunlap
2023-09-20 5:21 ` [PATCH 12/16] xtensa: tlb: include <asm/tlb.h> " Randy Dunlap
2023-09-20 5:21 ` [PATCH 13/16] xtensa: iss/network: make functions static Randy Dunlap
2023-09-20 5:21 ` [PATCH 14/16] xtensa: boot: don't add include-dirs Randy Dunlap
2023-09-20 5:21 ` [PATCH 15/16] xtensa: umulsidi3: fix conditional expression Randy Dunlap
2023-09-20 5:21 ` [PATCH 16/16] xtensa: boot/lib: add missing prototypes for functions Randy Dunlap
2023-09-20 11:54 ` Max Filippov
2023-09-20 12:11 ` [PATCH 00/16] xtensa: fix W=1 build warnings Max Filippov
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