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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Fabien Parent <fparent@baylibre.com>,
	Miles Chen <miles.chen@mediatek.com>,
	Macpaul Lin <macpaul.lin@mediatek.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Sam Shih <sam.shih@mediatek.com>,
	Frank Wunderlich <frank-w@public-files.de>,
	Jieyy Yang <jieyy.yang@mediatek.com>,
	Tinghan Shen <tinghan.shen@mediatek.com>,
	Seiya Wang <seiya.wang@mediatek.com>,
	soc@kernel.org
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	"Nícolas F. R. A. Prado" <nfraprado@collabora.com>
Subject: [PATCH 5/5] arm64: dts: mediatek: mt8195: Set DSU PMU status to fail
Date: Tue, 03 Oct 2023 13:13:47 +0200	[thread overview]
Message-ID: <20231003-mediatek-fixes-v6-7-v1-5-dad7cd62a8ff@collabora.com> (raw)
In-Reply-To: <20231003-mediatek-fixes-v6-7-v1-0-dad7cd62a8ff@collabora.com>

From: "Nícolas F. R. A. Prado" <nfraprado@collabora.com>

The DSU PMU allows monitoring performance events in the DSU cluster,
which is done by configuring and reading back values from the DSU PMU
system registers. However, for write-access to be allowed by ELs lower
than EL3, the EL3 firmware needs to update the setting on the ACTLR3_EL3
register, as it is disallowed by default.

That configuration is not done on the firmware used by the MT8195 SoC,
as a consequence, booting a MT8195-based machine like
mt8195-cherry-tomato-r2 with CONFIG_ARM_DSU_PMU enabled hangs the kernel
just as it writes to the CLUSTERPMOVSCLR_EL1 register, since the
instruction faults to EL3, and BL31 apparently just re-runs the
instruction over and over.

Mark the DSU PMU node in the Devicetree with status "fail", as the
machine doesn't have a suitable firmware to make use of it from the
kernel, and allowing its driver to probe would hang the kernel.

Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230720200753.322133-1-nfraprado@collabora.com
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 4dbbf8fdab75..43011bc41da7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -313,6 +313,7 @@ dsu-pmu {
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
 		cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
 		       <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+		status = "fail";
 	};
 
 	dmic_codec: dmic-codec {

-- 
2.42.0


  parent reply	other threads:[~2023-10-03 11:14 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-03 11:13 [PATCH 0/5] MediaTek: Update MAINTAINERS and dts fixes for v6.7 AngeloGioacchino Del Regno
2023-10-03 11:13 ` [PATCH 1/5] MAINTAINERS: Add Angelo as MediaTek SoC co-maintainer AngeloGioacchino Del Regno
2023-10-03 15:20   ` Mathieu Poirier
2023-10-03 11:13 ` [PATCH 2/5] arm64: dts: mediatek: mt8195-demo: fix the memory size to 8GB AngeloGioacchino Del Regno
2023-10-03 11:13 ` [PATCH 3/5] arm64: dts: mediatek: mt8195-demo: update and reorder reserved memory regions AngeloGioacchino Del Regno
2023-10-03 11:13 ` [PATCH 4/5] arm64: dts: mediatek: fix t-phy unit name AngeloGioacchino Del Regno
2023-10-03 11:13 ` AngeloGioacchino Del Regno [this message]
2023-10-03 11:37 ` [PATCH 0/5] MediaTek: Update MAINTAINERS and dts fixes for v6.7 AngeloGioacchino Del Regno
     [not found] ` <ZRwM06dwpF/7wEs5@sashalap>
2023-10-03 14:19   ` AngeloGioacchino Del Regno

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