From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48C4BCDB465 for ; Mon, 16 Oct 2023 13:49:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232235AbjJPNtN (ORCPT ); Mon, 16 Oct 2023 09:49:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233986AbjJPNsU (ORCPT ); Mon, 16 Oct 2023 09:48:20 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCCC51A4; Mon, 16 Oct 2023 06:48:00 -0700 (PDT) Received: from pendragon.ideasonboard.com (213-243-189-158.bb.dnainternet.fi [213.243.189.158]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3EDE6814; Mon, 16 Oct 2023 15:47:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1697464072; bh=f97DIqnul/BgQzKIc92p98PsvcgheZXYtkIIEDSitQg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hkY+O935WG4/lTsCXW1DTzUuFu9IGE3NfAAO9f/R3DH9d5HVLKMgqrksba/GoNZJl o8uyAVyyFfy2K12+hJE6TTvTwTcbdFwkut0zmC6fPsWhysSNXy3BR2KZGwr0SR/Ove aDTYRSjgpOamg/llJuUJZQt0BJ6FnLkhgMJ0z20E= Date: Mon, 16 Oct 2023 16:48:04 +0300 From: Laurent Pinchart To: Bernhard =?utf-8?Q?Rosenkr=C3=A4nzer?= Cc: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, angelogioacchino.delregno@collabora.com, matthias.bgg@gmail.com, gregkh@linuxfoundation.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, maz@kernel.org, tglx@linutronix.de Subject: Re: [PATCH v11 3/3] arm64: dts: mediatek: Initial mt8365-evk support Message-ID: <20231016134804.GA15778@pendragon.ideasonboard.com> References: <20230309213501.794764-1-bero@baylibre.com> <20230309213501.794764-4-bero@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230309213501.794764-4-bero@baylibre.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, A bit of a late reply, but I've just noticed an issue related to this patch. On Thu, Mar 09, 2023 at 10:35:01PM +0100, Bernhard Rosenkränzer wrote: > From: Fabien Parent > > This adds minimal support for the Mediatek 8365 SOC and the EVK reference > board, allowing the board to boot to initramfs with serial port I/O. > > Signed-off-by: Fabien Parent > [bero@baylibre.com: Removed parts depending on drivers that aren't upstream yet, cleanups, add CPU cache layout, add systimer, fix GIC] > Signed-off-by: Bernhard Rosenkränzer > [aouledameur@baylibre.com: Fix systimer properties] > Signed-off-by: Amjad Ouled-Ameur > Signed-off-by: Alexandre Mergnat > Tested-by: Kevin Hilman > Reviewed-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 168 +++++++++ > arch/arm64/boot/dts/mediatek/mt8365.dtsi | 377 ++++++++++++++++++++ > 3 files changed, 546 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi [snip] > diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > new file mode 100644 > index 0000000000000..351197c453c91 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > @@ -0,0 +1,377 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * (C) 2018 MediaTek Inc. > + * Copyright (C) 2022 BayLibre SAS > + * Fabien Parent > + * Bernhard Rosenkränzer > + */ > +#include > +#include > +#include > +#include > + > +/ { [snip] > + soc { [snip] > + infracfg: syscon@10001000 { > + compatible = "mediatek,mt8365-infracfg", "syscon"; > + reg = <0 0x10001000 0 0x1000>; > + #clock-cells = <1>; > + }; [snip] > + infracfg_nao: infracfg@1020e000 { > + compatible = "mediatek,mt8365-infracfg", "syscon"; > + reg = <0 0x1020e000 0 0x1000>; > + #clock-cells = <1>; > + }; These two nodes cause the infracfg clocks to be registered twice, with the second probe of the clk-mt8365 driver failing with -EEXIST. [snip] > + }; [snip] > +}; -- Regards, Laurent Pinchart