From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
To: patrick@stwcx.xyz, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 09/10] ARM: dts: aspeed: yosemite4: Revise i2c14 and i2c15 schematic change
Date: Wed, 1 Nov 2023 18:06:06 +0800 [thread overview]
Message-ID: <20231101100609.2516844-10-Delphine_CC_Chiu@wiwynn.com> (raw)
In-Reply-To: <20231101100609.2516844-1-Delphine_CC_Chiu@wiwynn.com>
Revise i2c14 and i2c15 schematic change:
- Revise adc128d818 adc mode for yosemite4 schematic change
- Revise ina233 for yosemite4 schematic change
- Remove idle state setting for yosemite4 NIC connection
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 31 ++++++++++++-------
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index d2b8091326ea..a0f0424457fa 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1010,44 +1010,54 @@ &i2c14 {
adc@1d {
compatible = "ti,adc128d818";
reg = <0x1d>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
- adc@35 {
+ adc@36 {
compatible = "ti,adc128d818";
- reg = <0x35>;
- ti,mode = /bits/ 8 <2>;
+ reg = <0x36>;
+ ti,mode = /bits/ 8 <1>;
};
adc@37 {
compatible = "ti,adc128d818";
reg = <0x37>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
power-sensor@40 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x40>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@41 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x41>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@42 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x42>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@43 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x43>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@44 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x44>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
temperature-sensor@4e {
@@ -1217,7 +1227,6 @@ mctp@10 {
i2c-mux@72 {
compatible = "nxp,pca9544";
- i2c-mux-idle-disconnect;
reg = <0x72>;
imux24: i2c@0 {
--
2.25.1
next prev parent reply other threads:[~2023-11-01 10:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-01 10:05 [PATCH v1 00/10] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2023-11-01 10:05 ` [PATCH v1 01/10] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
2023-11-01 10:05 ` [PATCH v1 02/10] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
2023-11-01 10:06 ` [PATCH v1 03/10] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
2023-11-01 10:06 ` [PATCH v1 04/10] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
2023-11-01 10:06 ` [PATCH v1 05/10] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
2023-11-01 10:06 ` [PATCH v1 06/10] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
2023-11-01 10:06 ` [PATCH v1 07/10] ARM: dts: aspeed: yosemite4: Add gpio pca9506 Delphine CC Chiu
2023-11-01 10:06 ` [PATCH v1 08/10] ARM: dts: aspeed: yosemite4: Revise i2c11 and i2c12 schematic change Delphine CC Chiu
2023-11-01 10:06 ` Delphine CC Chiu [this message]
2023-11-01 10:06 ` [PATCH v1 10/10] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
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