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([80.71.140.73]) by smtp.gmail.com with ESMTPSA id y125-20020a636483000000b005bd3d6e270dsm1356002pgb.68.2023.11.30.07.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 07:19:44 -0800 (PST) From: Emil Renner Berthing To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Emil Renner Berthing , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Cristian Ciocaltea , Geert Uytterhoeven Subject: [PATCH v2 0/8] Add JH7100 errata and update device tree Date: Thu, 30 Nov 2023 16:19:24 +0100 Message-Id: <20231130151932.729708-1-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that the driver for the SiFive cache controller supports manual flushing as non-standard cache operations[1] we can add an errata option for the StarFive JH7100 SoC and update the device tree with the cache controller, dedicated DMA pool and add MMC nodes for the SD-card and wifi. This series needs the following commit in [1] to work properly: 0d5701dc9cd6 ("soc: sifive: ccache: Add StarFive JH7100 support") ..and its parent for dtb_checks to pass. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=riscv-soc-for-next Changes in v2: - Add Conor's ack on patch 1/8 - Add my SoB on patch 2/8 - Update commit message on patch 4/8 Emil Renner Berthing (7): riscv: errata: Add StarFive JH7100 errata riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs riscv: dts: starfive: Add JH7100 cache controller riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards riscv: dts: starfive: Add JH7100 MMC nodes riscv: dts: starfive: Enable SD-card on JH7100 boards riscv: dts: starfive: Enable SDIO wifi on JH7100 boards Geert Uytterhoeven (1): riscv: dts: starfive: Group tuples in interrupt properties arch/riscv/Kconfig.errata | 17 +++ .../boot/dts/starfive/jh7100-common.dtsi | 131 ++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 48 ++++++- 3 files changed, 192 insertions(+), 4 deletions(-) -- 2.40.1