From: Conor Dooley <conor@kernel.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Inochi Amaoto <inochiama@outlook.com>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Chen Wang <unicorn_wang@outlook.com>,
Anup Patel <anup@brainfault.org>,
Samuel Holland <samuel.holland@sifive.com>,
Guo Ren <guoren@kernel.org>, Jisheng Zhang <jszhang@kernel.org>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v5 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs
Date: Mon, 4 Dec 2023 16:56:27 +0000 [thread overview]
Message-ID: <20231204-monorail-boxer-82c77526e764@spud> (raw)
In-Reply-To: <a1374b10-c012-4a3f-b56a-29ef4ca7e5f0@linaro.org>
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On Mon, Dec 04, 2023 at 05:39:09PM +0100, Daniel Lezcano wrote:
> On 04/12/2023 17:18, Conor Dooley wrote:
> > On Mon, Dec 04, 2023 at 05:51:08PM +0800, Inochi Amaoto wrote:
> > > The timer registers of aclint don't follow the clint layout and can
> > > be mapped on any different offset. As sg2042 uses separated timer
> > > and mswi for its clint, it should follow the aclint spec and have
> > > separated registers.
> > >
> > > The previous patch introduced a new type of T-HEAD aclint timer which
> > > has clint timer layout. Although it has the clint timer layout, it
> > > should follow the aclint spec and uses the separated mtime and mtimecmp
> > > regs. So a ABI change is needed to make the timer fit the aclint spec.
> > >
> > > To make T-HEAD aclint timer more closer to the aclint spec, use
> > > regs-names to represent the mtimecmp register, which can avoid hack
> > > for unsupport mtime register of T-HEAD aclint timer.
> > >
> > > Also, as T-HEAD aclint only supports mtimecmp, it is unnecessary to
> > > implement the whole aclint spec. To make this binding T-HEAD specific,
> > > only add reg-name for existed register. For details, see the discussion
> > > in the last link.
> > >
> > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> > > Fixes: 4734449f7311 ("dt-bindings: timer: Add Sophgo sg2042 CLINT timer")
> > > Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005693.html
> > > Link: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc
> > > Link: https://lore.kernel.org/all/IA1PR20MB4953F9D77FFC76A9D236922DBBB6A@IA1PR20MB4953.namprd20.prod.outlook.com/
> >
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> >
> > Although, I figure it is going to be me that ends up taking it.
>
> No, I should take it
Sweet, I'd rather you took it than it went via a DT tree :)
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next prev parent reply other threads:[~2023-12-04 16:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-04 9:49 [PATCH v5 0/2] Change the sg2042 timer layout to fit aclint format Inochi Amaoto
2023-12-04 9:51 ` [PATCH v5 1/2] dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs Inochi Amaoto
2023-12-04 14:52 ` Guo Ren
2023-12-04 16:18 ` Conor Dooley
2023-12-04 16:39 ` Daniel Lezcano
2023-12-04 16:56 ` Conor Dooley [this message]
2023-12-04 23:14 ` Inochi Amaoto
2023-12-04 17:33 ` Daniel Lezcano
2023-12-04 9:51 ` [PATCH v5 2/2] riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format Inochi Amaoto
2023-12-04 14:51 ` Guo Ren
2024-01-22 3:04 ` Inochi Amaoto
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