From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: x86@kernel.org
Cc: Andreas Herrmann <aherrmann@suse.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Chen Yu <yu.c.chen@intel.com>, Len Brown <len.brown@intel.com>,
Radu Rendec <rrendec@redhat.com>,
Pierre Gondois <Pierre.Gondois@arm.com>, Pu Wen <puwen@hygon.cn>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Will Deacon <will@kernel.org>, Zhang Rui <rui.zhang@intel.com>,
Huang Ying <ying.huang@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
stable@vger.kernel.org, linux-kernel@vger.kernel.org,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Subject: [PATCH v4 0/4] x86/cacheinfo: Set the number of leaves per CPU
Date: Tue, 12 Dec 2023 14:25:15 -0800 [thread overview]
Message-ID: <20231212222519.12834-1-ricardo.neri-calderon@linux.intel.com> (raw)
Hi,
The interface /sys/devices/system/cpu/cpuX/cache is broken (not populated)
if CPUs have different numbers of subleaves in CPUID 4. This is the case
of Intel Meteor Lake.
This is v4 of a patchset to fix the cache sysfs interface by setting the
number of cache leaves independently for each CPU.
v1, v2, and v3 can be found here[1], here[2], and here[3].
All the tests described in [4] passed.
Changes since v3:
* Fixed another NULL-pointer dereference when checking the validity of
the last-level cache info.
* Added the Reviewed-by tags from Radu and Sudeep. Thanks!
* Rebased on v6.7-rc5.
Changes since v2:
* This version uncovered a NULL-pointer dereference in recent changes to
cacheinfo[5]. This dereference is observed when the system does not
configure cacheinfo early during boot nor makes corrections later
during CPU hotplug; as is the case in x86. Patch 1 fixes this issue.
Changes since v1:
* Dave Hansen suggested to use the existing per-CPU ci_cpu_cacheinfo
variable. Now the global variable num_cache_leaves became useless.
* While here, I noticed that init_cache_level() also became useless:
x86 does not need ci_cpu_cacheinfo::num_levels.
Thanks and BR,
Ricardo
[1]. https://lore.kernel.org/lkml/20230314231658.30169-1-ricardo.neri-calderon@linux.intel.com/
[2]. https://lore.kernel.org/all/20230424001956.21434-1-ricardo.neri-calderon@linux.intel.com/
[3]. https://lore.kernel.org/lkml/20230805012421.7002-1-ricardo.neri-calderon@linux.intel.com/
[4]. https://lore.kernel.org/lkml/20230912032350.GA17008@ranerica-svr.sc.intel.com/
[5]. https://lore.kernel.org/all/20230412185759.755408-1-rrendec@redhat.com/
Ricardo Neri (4):
cacheinfo: Check for null last-level cache info
cacheinfo: Allocate memory for memory if not done from the primary CPU
x86/cacheinfo: Delete global num_cache_leaves
x86/cacheinfo: Clean out init_cache_level()
arch/x86/kernel/cpu/cacheinfo.c | 49 +++++++++++++++++----------------
drivers/base/cacheinfo.c | 9 +++++-
2 files changed, 34 insertions(+), 24 deletions(-)
--
2.25.1
next reply other threads:[~2023-12-12 22:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-12 22:25 Ricardo Neri [this message]
2023-12-12 22:25 ` [PATCH v4 1/4] cacheinfo: Check for null last-level cache info Ricardo Neri
2024-01-25 11:15 ` Sudeep Holla
2024-01-25 14:35 ` Ricardo Neri
2023-12-12 22:25 ` [PATCH v4 2/4] cacheinfo: Allocate memory for memory if not done from the primary CPU Ricardo Neri
2023-12-12 22:25 ` [PATCH v4 3/4] x86/cacheinfo: Delete global num_cache_leaves Ricardo Neri
2023-12-12 22:25 ` [PATCH v4 4/4] x86/cacheinfo: Clean out init_cache_level() Ricardo Neri
2024-01-25 2:56 ` [PATCH v4 0/4] x86/cacheinfo: Set the number of leaves per CPU Ricardo Neri
2024-01-25 11:17 ` Sudeep Holla
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